16 point radix 2

轴系测试程序，多通道输入输出，实现时域、频域、轴心轨迹、瀑布图等功能。(Shafting test program, multi-channel input and output, to achieve time domain, frequency domain, orbit, waterfall and other functions.)

altera 公司的15IP源码 亲自测试还不错 有DIV, CONTER-ALTERA the 15IP source personally tests are also good DIV, CONTER

orcad schematics for 8051 with rtc and lcd

xilinx 开发板程序，LED灯控制程序-Xilinx development board procedures, LED lamp control procedures

8051core-Verilog FPGA的51单片机内核源代码! -8051core-Verilog FPGA 51 Singlechip kernel source code!

用FPGA实现DDS的原理图，结构清晰，采用总线方式与外部单片机通信-FPGA realization of DDS with the schematic diagram, structural clarity, the use of bus-way communication with the outside Singlechip

自己写的 AXI master code(AXI master code)

source code for Ethernet logic

多功能卡的源代码，verilog编写，用于多功能的数据接收-verilog code of mutiple function card

Verilog Language Manual