一个可以综合的Verilog 写的FIFO存储器 内附文档说明

说明：  Verilog实现液晶1602显示,学习使用(Verilog LCD1602)

用Verilog语言实现的FPGA UART独立收发模块 思路简单，代码简洁。在Lattice LFE3EA VERSA开发板上验证通过,编译器Lattice Diamond. 功能：串口收到数据后立即回传，此后每一秒串口数据+1再发送。(Using Verilog language independent of FPGA UART transceiver idea is simple, concise code. Development board in Lattice LFE3EA VERSA verified by the compiler Lattice Diamond. Features: Serial data is received immediately after the return, then every second serial port and then send the data+ 1.)

this a example for the LCD for altera FPGA cyclone ii EP2C8. implemented in verilog. tested using altera EP2C8 fpga

四分频的程序，输出clkout0就是二分频，clkout1是四分频-Quarter-frequency process, the output clkout0 is two-way, clkout1-fourth the frequency

verilog 实现的FFT 流水线操作，速度能达到200M(verilog pipelining the FFT implementation, the speed can reach 200M)

一些verilo的经典实例，非常适合初学者(verilo of the classic examples, for beginners)

altera 公司的15IP源码 亲自测试还不错 有DIV, CONTER-ALTERA the 15IP source personally tests are also good DIV, CONTER

应用背景****************************************************************************关键技术这个项目的目的是研究开发板的最大。该项目是实现闪烁的发光二极管具有不同的频率和/关闭时，你按按钮。

说明：  一个具备bp协议典型功能的数据传输系统（超时重传机制以及托管传输）包含五个节点(A data transmission system with typical functions of BP protocol (Overtime retransmission mechanism and managed transmission) consists of five nodes)

这是关于赢vhdl语言变得信号采集卡，很有实用性，大家可以来看看的。-This is about winning VHDL language has become signal acquisition card, is very practical, we can take a look at the.