Verilog实现的VGA程序，用ISE打开工程文件即可

MIPS处理器的组员大作业，可以直接运行，提交，环境是quartus-MIPS processor crew great job, you can run directly, the author, the environment is quartusII

Xapp 200 64 bit DDR SDRAM design files for Xilinx Vertix

at070tn83 800x480 tft lcd verilog 測試 quartus 文件 (800x480 tft lcd at070tn83 testing project file)

这是一本关于VHDL编程的书籍,网上突然发现的,相信对相关人员会有所用途.-This is a book on VHDL programming, on-line suddenly found, I believe that the relevant staff will be use.

Leonardo综合器用STDL80 0.5um综合库，安装见说明，找到它真不容易。(STDL80 0.5um ASIC Library for Leonardo)

通过监测工作状态实现带有IIC通讯功能的数据发送接收(to implement the sending and receiving data function of iic communication )

DDS信号源设计，有正弦波，方波，三角波，AM波，FM波，还有PSK,FSK,16QAM等多种信号产生。(DDS signal source design, there are sine, square wave, triangle wave, AM wave, FM wave, as well as PSK, FSK, 16QAM and other signal generation.)

this file is vhdl code of alu

这个是用VHDL实现FPGA对FLASH的读写。(This is achieved using VHDL FLASH FPGA to read and write.)

带有电网电压反馈的单相PWM整流器反馈，输出的波形很好，适合初学者学习观摩(With power grid voltage feedback single-phase PWM rectifier feedback, the output waveform is very good, suitable for beginners learning view )