基于FPGA实现数控机床高速运动的DDA设计

Design FPGA in Labview

说明：  16级流水线型cordic旋转代码以及测试文件，亲测好用(16-stage pipelined cordic rotation code and test files, pro-testing)

用VHDL语言实现一Mealy型时序电路，并做时序仿真和功能仿真检验正确与否。(Implement a Mealy-type sequential circuits using VHDL language, and do functional simulation and timing simulation test correct.)

this project is about FIR FIlter By VHdl codes in the ISE.

4*4键盘小程序 两种算法内附检查LED(4* 4 keyboard applet containing two algorithms check the LED)

基于FPGA的快速傅里叶变换。使用ISE软件以及MATLAB验证。(FFT based on FPGA)

北航夏宇闻的Verilog的PPT讲稿，挺经典的，适合初学者学习(Northern Xia Yu Wen' s Verilog the PPT script, very classic, suitable for beginners to learn)

计时范围为59.99秒；有计时开始和停止计时控制，复位控制可以对所有计时进行异步复位；计时结果由四位七段数码管显示。

基于nios ii 控制altera de1 开发板上iic总线实现与at24c02通信-Based on nios ii controlled altera de1 Development Board iic bus for communication with the at24c02

产生高斯最小相移键控信号的阐述仿真，包括调制解调、信道模型等。(Simulation program to realize GMSK transmission system)