Based on quartus a 3

FIR filter basic verilog code for implementation-FIR filter basic verilog code for implementation

I2C 串口通讯Xilinx项目源码 拷贝到硬盘，用ISE打开工程文件即可。-I2C Serial Communication Xilinx source project are copied to the hard drive, using ISE project file can be opened.

fp codes is used to realize the aritjmetics

说明：  APPCM算法和AD/DA芯片驱动在CPLD中的实现，已在实际硬件中测试OK，quartus2环境(APPCM algorithm and AD/DA chip in the drive to achieve in the CPLD has been tested in actual hardware OK, quartus2 environment)

1. REVISION HISTORY 2. OVERVIEW 3. SOFTWARE TOOLS AND SYSTEM REQUIREMENTS 4. DESIGN FILE HIERARCHY 5. INSTALLATION AND OPERATING INSTRUCTIONS 6. SUPPORT

四位乘法器的VHDL源程序-four Multiplier VHDL source

对MAX5250芯片进行控制，实现DA转换输出。(Controlling MAX5250 Chip)

一个在CPLD，EPM70128上实现的PWM控制源程序。(A CPLD, EPM70128 realize the PWM control on the source.)

基于verilog的FIR滤波器程序设计（调试过的）-verilog

XAPP585 serdes_1_to_7 and serdes_7_to_1 data