VGA的实现

用Verilog实现的交通信号灯控制，主干道和支路通行的时间不相等(Using Verilog implementation of traffic signal control, the trunk road and the slip is not the same passage of time)

本文详细介绍了我们的电气工程项目；

代码基于VHDL语言的个文化代码有用的但是可能有错误下在是倾销心-VHDL code based on the cultural code useful but may be under the wrong heart is dumping

《Verilog HDL 程序设计教程》2-"Verilog HDL Design Guide," 2

本文为通信专业硕士研究生的毕业论文。主要研究神经网络的FPGA实现及其在网络拥塞控制中的应用。 (In this paper, for the communications professional Master s thesis. Major study of the FPGA realization of neural networks and its application in network congestion control applications.)

通过数码管和单片机的组合 制作成的数码管时钟程序(Through the combination of digital control and made ​ ​ into a single-chip digital clock program)

用FPGA实现的模糊控制器 部分用VHDL编写的源程序-Using FPGA to achieve some of the fuzzy controller using VHDL source code prepared

Paint for SPARTAN 3E

主要用来介绍如何编写高质量的verilog程序的(Is mainly used to describes how to write high-quality verilog programs)

60进制计数器,（由一六进制和十进制连线组成）(60 binary counter (hexadecimal and decimal by a connection form))