对于Spartan 3E漆

FPGA的经典例程，可以进行移植和借鉴使用(FPGA' s classic routines, can be transplanted and learn to use)

适合DE2板，能够在板子上的液晶显示器上实现时钟功能。-for Dictyophora board, in the way of achieving LCD clock function.

描述Bayer图像无损压缩的一种先进算法及其如何在FPGA上实现(Description Bayer Image is an advanced lossless compression algorithms in the FPGA to achieve and how)

USB设备接口的驱动程序，采用verilogHDL语言编写，并包含相关说明资料(USB device driver interface, using verilogHDL language, and contains descriptive information)

RS 编码和解码Verilog Code, 实现了RS（544,514)的编码和译码；(-RS Coding and Decoding Verilog code，　implement RS（544,514))

user guide for teal and truss for system verilog

imp book for cmos technology

《VHDL程序设计教程》光盘使用说明 本光盘是邢建平和曾繁太所著《VHDL程序设计教程》一书的配书光盘。本光盘的著作权归作者所有。 清华大学出版社享有该光盘的中文简体版专有出版权。 本光盘包括如下目录： “e_teaching_vhdl”--CAI教学材料 包含全套的PowerPoint文件，可以直接用于教学，具体请参见该目录中的index.pps文件说明。 共包含前言、第一章到第六章的教学文件。目前包含的为中文版辅助材料。 “vhdl fortextboot”--教程代码 包含本书教程例子的所有代码。 “vhdl for lab”--教程实验部分代码 包含本书教程实验部分所有代码。 “vhdl solutions”--教程习题参考解答 包含本书教程习题参考解答的文档。 “class music”--课间休息音乐欣赏 包含课间休息的中外音乐欣赏。 ("VHDL Programming Guide" CD-ROM for use This disc is too SENSORS and Tseng Fan book "VHDL Programming Guide," a book with the book CD. Of the copyright of the CD-ROM of all. Tsinghua University Press entitled The Simplified Chinese version of the CD exclusive copyright. This CD includes the following directories: "E_teaching_vhdl"- CAI teaching materials Contains the full set of PowerPoint files can be directly used in teaching, specifically refer to the directory index.pps documentation. Contains a total of introduction, the first chapter to the sixth chapter of the teaching file. Currently contained in the supplementary material for the Chinese version. "Vhdl fortextboot"- Tutorial code Tutorial examples include all of the code book. "Vhdl for lab"- Tutorial test sections of code Experimental part of the tutorial contains all the code book. "Vhdl solutions"- solutions for reference Tutorial exercises Reference bo)

FPGA TW2867输入到ADV7171显示实验(FPGA TW2867 input to the ADV7171 display experiment)

VHDL_COUNTING 0_9_LED 7 段 (ĐẾM 0 ĐẾN 9 HIỂN THỊ LED 7 ĐOẠN BẰNG NGÔN NGỮ VHDL)