基于FPGA的乐曲发生器电路设计 附含源代码（quartersii环境下运行）...

实现BCD码的加法，用VHDL实现，是书籍上配套的-BCD ADDER，Using VHDL

VDHL的简单DEMO演示，有利于初学者学习使用(VDHL simple demo DEMO will help beginners learn to use)

电子表，实现计时记分计秒的功能，同时可以对时分秒进行校正，实现调时功能。-Electronic watches, time points of dollars to achieve a second function, at the same time when the minutes and seconds can be calibrated to achieve when the transfer function.

AMBA设计和AHP桥梁SoC解决方案和测试策略。它是利用Xilinx和SIM模式和综合结果表明握手的两个通信协议 之间更好的预测。的设计示出了在有效的面积和速度方面。

i2c master ip for altera nios, add in qsys

一款介绍Soc使用的PDF文档供大家看和实践，还是有一定参考价值的！-A description Soc using PDF documents for everyone to see and practice, there are still some reference value!

基于sopc ep2c5开发板的液晶字符显示例程-Sopc ep2c5 development board based on liquid crystal character display routine

一些较为经典的VHDL代码,专注于信号分析与检测方面-Some of the more classic of the VHDL code, focusing on signal analysis and testing

高速双端口RAM的vhdl实现。包含仿真波形-High-speed dual-port RAM realize the VHDL. Contains the simulation waveform

将嵌入式BT656格式数据解码出带行场同步信号的YCbCr422格式数据(Decoding Embedded BT656 Format Data to YCbCr422 Format Data with Field Synchronization Signa)