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h264_intp
图形图像H264插值算法,应用于图像视频处理(H264 graphic image interpolation algorithm is applied to image video processing)
- 2021-05-14 18:30:02下载
- 积分:1
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这是个的VHDL点亮LED的程序,大家一齐分享吧
这是个的VHDL点亮LED的程序,大家一齐分享吧-This is a LED light up the VHDL procedure, let everyone together to share
- 2022-01-22 01:19:17下载
- 积分:1
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imports
displayport 参考设计,可以对比自己工程做验证,另有参考设计XAPP1178未找到,采用方案为DP159 + Artix7 FPGA(xilinx displayport sink design)
- 2021-01-11 16:58:50下载
- 积分:1
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gtwizard_254_127_ex_1113_3
配置GTH ip的例子工程,选用7 series 芯片的GTH 113quad的四个通道,在程序中每个链路利用自己的恢复时钟进行数据解码,所以四个通道可以各自独立运行;成功工作在2.54Gb/s的链路状态,长时间(>24小时)的测试,误码率一直为0.(The GTH ip example project is configured with four channels of the GTH 113quad of the 7 series chip. Each link in the program uses its own recovery clock for data decoding, so the four channels can operate independently; the successful operation is at 2.54Gb/ The link state of s, long time (>24 hours) test, the bit error rate has been 0.)
- 2019-06-17 21:33:56下载
- 积分:1
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Some useful things to know about picoblaze microcontroller.
Some useful things to know about picoblaze microcontroller.
- 2022-06-12 10:25:48下载
- 积分:1
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full adder设计代码,verilog 语言描述,通过modelsim 仿真,quartus综合...
full adder设计代码,verilog 语言描述,通过modelsim 仿真,quartus综合-full adder design code, verilog language to describe, through the ModelSim simulation, quartus integrated
- 2022-06-30 03:26:15下载
- 积分:1
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VHDL_count 从 0 到 9 4 7 段 LED 显示 4 脉冲使 (đếm 慈 0 đến 9 hiển 施耐 4 带领 7 đoạn với 4 xung 启用)
VHDL_count 从 0 到 9 4 7 段 LED 显示 4 脉冲使 (đếm 慈 0 đến 9 hiển 施耐 4 带领 7 đoạn với 4 xung 启用)
- 2022-05-29 10:17:32下载
- 积分:1
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Experiment_1_Xilinx
很不错的FPGA入门级实验指导书,按照实验的知道,能够学会使用ISE仿真简单的流水灯。教程较为详细,从硬件连接到代码编写都做了详细指导,适合新手入门。(Very good entry-level FPGA experimental guide books, according to the experiment know, be able to learn to use the ISE Simulator simple water lights. Tutorial in detail, the hardware connected to the coding have done a detailed guide for beginners.)
- 2016-09-16 23:07:26下载
- 积分:1
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MRAM2012
STT-MRAM磁性存储器全部verilog代码和仿真验证代码,包括行为模块,读写模块和控制模块,已经经过验证完全正确(STT-MRAM magnetic memory all the code and simulation code, including behavior module, reader module and the control module, has been proven entirely correct)
- 2020-06-29 14:20:02下载
- 积分:1
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src
yuv444 与yuv422相互转换verilog语言(yuv444 to yuv422)
- 2021-01-20 14:38:41下载
- 积分:1