中科院VHDL学习资料，很好的东西，希望对大家有用

FPGA中FLASH配置控制源码,VHDL和Verilog(FPGA source code in the FLASH configuration control, VHDL and Verilog)

RISC CPU IP CORE 可以用于直接的工程开发应用 有详细的说明书-RISC CPU IP CORE can be used to direct the development and application of the project has a detailed brochure

verilog 驱动TLC5510代码，TLC5510是高速的AD，可达20MHz(verilog code driven TLC5510, TLC5510 is a high-speed AD, up to 20MHz)

本程序使用Verilog语言实现了SPI接口的设计，可以直接烧到FPGA实现与MCU的通信,自带有测试文件。(The program uses the Verilog language design SPI interface, you can burn directly communicate with the FPGA, MCU, comes with a test file.)

利用FPGA，产生三相SPWM波，与后继硬件电路配合，形成三相电源。高效，实用。(Using FPGA, produce three-phase SPWM wave, with subsequent hardware circuit with the formation of three-phase power. Efficient and practical.)

IT IS THE DP MEMORY MODULE. IT CONTROLS THE DP MEMORY

基于LabVIEW FPGA的频谱估计与分析(the power spectrum estimation and analysis based on LabVIEW FPGA)

数字时钟，包括流程图以及编码和完整的实验报告，内容详细丰富。(Digital clock, including flowcharts, and coding and a full lab report, detailed and rich.)

how to use step motor control

A VANET research program