verilog 代码. 经验证成功,可以作为标准单元库,为FPGA设计者使用....

说明：  一个简单的CPU设计，支持add，sub，mvi，mv四条指令，用Verilog语言编写，在Quratus II上编译通过，仿真正确。(A simple CPU design, support add, sub, mvi, mv four instructions, with the Verilog language, compiled by the Quratus II, the simulation is correct.)

基于ＦＰＧＡ实现移位乘法功能，已经验证，十分好用。-FPGA-based multiplication realize shift function, has been verified, is very easy to use.

本例是关于卷积码的一个简单算法，用verilog HDL语言编写，整个文档包括了产生卷积的整个工程。-In this case is a convolutional code on a simple algorithm, using verilog HDL language, the entire document, including the method of deconvolution of the whole project.

一个AD9226芯片的驱动，用FPGA写的。虽然简单，但是希望对各位有帮助(An AD9226 chip driver, FPGA written. Though simple, but I hope you will help)

介绍分频器的好资料。不光有奇数分频、偶数分频，还有小数分频。相信把这个资料理解透了后以后分频器的设计就不是问题了。(Introduction divider good information. Not only have an odd frequency, even frequency, there are fractional. I believe understanding this information through the post after the Divider is not a problem.)

THE SOURCE REALIZE THE TRANSFORMATION FROM YUV TO RGB

基于VHDL语言的DPLL电路的设计，给出了设计方案和部分源代码 (DPLL)

VHDL语言的cookbook,能够使你更快的学会使用VHdL-cookbook

使用Xilinx3S400开发的钢板检测算法中心化算法，通过测试。(a vhdl-program use Xilinx3S400)

利用verilog语言设计实现8路FIR滤波-Using verilog Language Design and Implementation of 8-channel FIR filter