一篇关于FIFO设计以及FPGA设计的文章

获取主机CPU信息，VS2008编译通过，含详细说明(Get information on the host CPU, VS2008 compiler, containing detailed instructions)

说明：  银行排队系统的VHDL程序实现，可以实现排队顾客自动取号，查看前面排队人数，银行服务柜台号等。(Bank queuing system VHDL program can be achieved automatically check its customers lined up to view the queue in front of the number of its banking services, such as counters.)

该源码可基于FPGA设置多分辨率的HDMI显示，且其包含了完整的时序和端口、地址映射，可以很方便的将其移植(The source code can be set based on FPGA multi-resolution HDMI display, and it includes a complete timing and port, address mapping, it can be easily transplanted)

用VHDL语言编写的串口通讯模块，可以实现发送和接受功能。-A UART module writen in VHDL.

一个小程序,弹跳消除电路,可消除按健的毛刺干扰-a small procedure, bouncing elimination circuit, according to remove the burr-interference

VHDL语言编写的I2C通信接口,可与单片机等MCU相连,只占用很少的引脚线完成数据的传输(Written in VHDL I2C communication interface, such as MCU and MCU can be connected, only takes a few lines to complete the data transmission pin)

该程序实现了一个FIR滤波加速器，该程序在FPGA板上开发，通过使用VHDL语言来定义RS232端口的使用(design a FIR Filter Accelerator based on FPGA board and RS232 interface using VHDL language. )

FPGA的专业综合工具，学习此第三方工具的经典教程-FPGA 专 业 酆 危 撸 学魏 说 叩 木坛

fpga测温的框图和源码 希望能帮到大家 没有测试 紧供参考-fpga vhdl

说明：  MATLAB to HDL Code conversion