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FPGA.Implementations.of.Neural.Networks
FPGA神经网络设计(影印本),全英文,很有用(FPGA neural network design (photocopies), all in English, very useful)
- 2008-05-21 21:14:28下载
- 积分:1
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cpsk_dpsk
数字通信系统相移键控CPSK信号和差分相移键控的调制与解调的VHDL代码(Phase shift keying digital communication system CPSK signals and differential phase-shift keying modulation and demodulation of the VHDL code for)
- 2009-11-06 16:11:03下载
- 积分:1
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vhdl,序列信号发生器,发出11101010,可更改为任意序列
vhdl,序列信号发生器,发出11101010,可更改为任意序列-vhdl, sequence signal generator, issued 11.10101 million, you can change an arbitrary sequence of
- 2023-08-12 03:05:03下载
- 积分:1
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cpu-maxplus
MaxplusII编写的简易cpu,可实现简单加减法等操作(MaxplusII summary prepared by the cpu can realize simple addition and subtraction, etc)
- 2007-06-08 17:55:10下载
- 积分:1
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实现了三种乘法器,可以进行性能比较,比较有较之
实现了三种乘法器,可以进行性能比较,比较有较之-multi
- 2022-08-06 11:47:17下载
- 积分:1
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分数阶傅里叶变换FRFT的土耳其算法的FPGA实现的程序 FRFT Ozaktas
这是分数阶傅里叶变换FRFT的土耳其算法的FPGA实现的程序,FPGA是Xilinx的virtecx-5,这是我在做毕业设计的时候自己编写的,希望能对你有帮助!(This is the fractional Fourier transform algorithm FRFT Turkish FPGA implementation of the program, FPGA is the Xilinx virtecx-5, which is what I was doing graduate design time I have written, I hope you can help!)
- 2021-03-12 10:49:25下载
- 积分:1
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用VHDL实现一个四位十进制计数器来进行计数,并且仿真通过
用VHDL实现一个四位十进制计数器来进行计数,并且仿真通过-To use VHDL to achieve a 4 decimal counter to count, and the simulation through the
- 2022-06-18 07:56:39下载
- 积分:1
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采用Verilog HDL硬件语言设计,实现基本的公用电话计费功能,设计完整....
采用Verilog HDL硬件语言设计,实现基本的公用电话计费功能,设计完整.-Using Verilog HDL language hardware design, the realization of the basic public telephone billing function, design integrity.
- 2022-02-25 23:14:29下载
- 积分:1
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这是可编程逻辑器件(CPLD)初学者的入门级文章,仅供参考。...
这是可编程逻辑器件(CPLD)初学者的入门级文章,仅供参考。-This is the programmable logic device (CPLD), the entry-level beginners articles for reference purposes only.
- 2022-01-22 10:28:59下载
- 积分:1
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12864hanzixianshi
基于FPGA 的12864液晶显示汉字,用verilog编写的。(12864 liquid crystal display Chinese characters based on FPGA, written in verilog.)
- 2021-04-27 15:48:44下载
- 积分:1