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用vhdl描写的通用异步改进dram控制器,经过编译器综合和仿真测试,符合设计要求。...
用vhdl描写的通用异步改进dram控制器,经过编译器综合和仿真测试,符合设计要求。-Using VHDL description Universal Asynchronous improved dram controller, through an integrated compiler and simulation testing, in line with the design requirements.
- 2022-04-19 09:59:57下载
- 积分:1
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SPI协议的VHDL/Verilog语言实现 SPI_Core
SPI协议的VHDL/Verilog语言实现。(SPI agreement VHDL/Verilog language.)
- 2020-06-27 10:00:02下载
- 积分:1
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I2C_CSDN
说明: verilog 编写的I2C程序,控制D/A的(I2C program written by Verilog to control D/A)
- 2020-06-18 21:20:02下载
- 积分:1
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sm4_Verilog
sm4 VERILOG 代码实现及其在无线网络3G中的应用(sm4 VERILOG)
- 2020-08-11 20:58:27下载
- 积分:1
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verilog实现的1024位的大数模逆算法,引入RAM作为数据通道
verilog实现的1024位的大数模逆算法,引入RAM作为数据通道-verilog to achieve the 1024 Modular inverse algorithms, the introduction of RAM as a data channel
- 2022-12-18 20:35:03下载
- 积分:1
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DSP-keshe
设计题目:基于MATLAB的FFT算法的设计
设计内容:
所设计的FFT算法应完成以下功能:
(1)在MATLAB环境下编写FFT算法(不调用系统现有函数);
(2)实现对选定图片进行FFT计算、还原(IFFT计算),并与系统FFT函数做对比,进行分析;
(3)设计GUI界面。
(Design topics: content based on the the MATLAB FFT algorithm design design: the design of the FFT algorithm should perform the following functions: (1) the FFT algorithm written in MATLAB environment (do not call existing function of the system) (2) to achieve the selected picture for FFT calculation, restore (IFFT calculation) system FFT function analysis (3) design GUI interface.)
- 2013-04-09 16:51:00下载
- 积分:1
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psk_rician-channel-MATLAB
QPSK在赖斯信道下的模拟仿真,包括K=6和K=10下的情况(QPSK in, Laisi Xin Road, under the simulation, including the case of K = 6 and K = 10 under)
- 2013-04-26 21:30:18下载
- 积分:1
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full adder in vhdl of 4 bits
full adder in vhdl of 4 bits
- 2022-02-01 04:44:39下载
- 积分:1
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cadence verilog lanaguage and simulation course
cadence verilog lanaguage and simulation course
- 2022-03-03 00:45:22下载
- 积分:1
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ad0809
对ad0809的控制代码( ad0809control)
- 2010-08-28 15:00:50下载
- 积分:1