procedures major hardware description language (VHDL) to achieve : MCU and FPGA...

一个简单的后台模板，主要为贵金属直播室有喊单等功能类型的。 ps：由于涉及到iframe本地跨域问题，因此查看时请在服务器上进行审阅。(A simple background template, mainly for the precious metal living room, such as the type of function. PS: as a result of the local cross domain problem involved in the iframe, so check it out on the server.)

很好的quartus软件仿真教程，flash版。-Good quartus software simulation tutorials, flash version.

自已写的一个16X16的乘法器，速度比较慢。初学者练习练习！-own writing an audio Multiplier, speed is relatively slow. Beginners practice practice!

In this design, it is assumed that a buffer sized as 1024x8 bits provides main data including scale factors and Huffman code bits to Huffman decoder. Also, it is assumed that a memory with 1024x8 bits is ready for each component to write or read the output or input 576 frequency lines.(This folder contains three directories: Huffman, IMDCT and Filterbank, each of them includes all the VHDL source codes of the component.)

编写 VHDL 代码为 4 x 1 多路复用器，使用下面的方法 (1) if else 语句 (2) case 语句 (3) 与声明

四位密码锁，移位显示，可以设置和更改密码。-4 lock, shift, it can be set up and change your password.

FPGA用于实现crc16编码的verlog源程序，用到的请下载。(FPGA is used to achieve the the crc16 the encoding of verlog source code used to download.)

这是一个二进制的最简单分频器，是一个简短的fpga代码，用verilog书写(This is the most simple of a binary frequency divider, the fpga is a short code, written in verilog)

大屏幕led点阵显示的驱动时序。 使用vhdl语言描述。其中rom文件可以使用lpm_megcore自动生成。-big screen led to the dot matrix display driver timing. The use of VHDL description language. Rom which documents can be automatically generated using lpm_megcore.

FPGA实现DDS波形发生器，多种信号的产生，(FPGA realization of DDS waveform generator to produce a variety of signals,)