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BCH3
BCH3.c,提供m<21以下的所有码长的BCH编解码模块。以供大家参考。谢谢(BCH encoder&decoder GF(2^m) m<21)
- 2021-01-26 11:58:36下载
- 积分:1
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本文件解压后clock_time.vhd采用编程环境maxplusII,完成时间秒定时、记时,设置时间秒、声光报警等功能。...
本文件解压后clock_time.vhd采用编程环境maxplusII,完成时间秒定时、记时,设置时间秒、声光报警等功能。-this document unpacked clock_time.vhd maxplusII use programming environment, the time for completion seconds timing, Hutchison, the set-up time seconds, sound, light, alarm functions.
- 2022-07-03 03:02:23下载
- 积分:1
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pdf
说明: 一种基于FPGA的调频连续波方位向多通道
FMCW SAR的实时成像信号处理方法及FPGA,包
括:步骤一、计算重构矩阵;步骤二、重构方位向
多通道数据,包括:步骤2 .1、对各个通道的回波
数据沿方位向分别间隔补零,并进行方位向傅里
叶变换;步骤2 .2、将方位向傅里叶变换之后各个
通道方位向相同位置的点组合为一个向量并与
重构矩阵相乘,得到重构完成的方位向数据;(An azimuth multichannel FMCW based on FPGA
FMCW SAR real-time imaging signal processing method and FPGA, package
Including: Step 1: calculate the reconstruction matrix; step 2: reconstruct the orientation
Multichannel data, including: step 2.1, echo of each channel
The data is compensated with zero along the azimuth direction respectively, and the azimuth Fourier is carried out
Step 2.2, after the azimuth Fourier transform
The points of the same position in the channel azimuth are combined into a vector and are connected withThe reconstruction matrix is multiplied to get the reconstructed azimuth data
Step 2.3. Repeat step 2.3 for the data of different distance gates)
- 2020-02-07 19:47:41下载
- 积分:1
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用FPGA实现IIC通讯的主控端,最简化的代码,占用最小FPGA资源
用FPGA实现IIC通讯的主控端,最简化的代码,占用最小FPGA资源-Use FPGA to come ture the main control of the iic comunication, the most simple code and using the least FPGA resource
- 2022-07-10 12:46:57下载
- 积分:1
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一个用VHDL语言编写的双端口存储器程序,可下载在FPGA中使用
一个用VHDL语言编写的双端口存储器程序,可下载在FPGA中使用-Written in VHDL language using a dual-port memory program can be downloaded in the FPGA using
- 2023-06-18 05:20:03下载
- 积分:1
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shengyinchuli
通过matlab对于声音进行处理,实现FFT,均值,方差,中值滤波,自相关分析,白噪声等处理(Matlab sound processing, FFT, mean, variance, median filtering, autocorrelation analysis, white noise and processing)
- 2021-03-01 22:29:34下载
- 积分:1
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tongbu
使用VERILOG开发时钟同步算法,能够从数据信号中提取时钟信息,(Clock synchronization algorithm using VERILOG developed to extract the clock from the data signal information,)
- 2020-11-11 12:39:44下载
- 积分:1
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P2S
Parallel to Serial converter Module
- 2013-07-27 18:06:44下载
- 积分:1
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Some useful things to know about picoblaze microcontroller.
Some useful things to know about picoblaze microcontroller.
- 2022-06-12 10:25:48下载
- 积分:1
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Mainly on the introduction MAGIC3000 series CPLD development board of the 10 exa...
主要介绍了关于MAGIC3000系列CPLD开发板的十个实例,如霓虹灯演示、与PC串口通信等。-Mainly on the introduction MAGIC3000 series CPLD development board of the 10 examples, such as neon demonstration, with the PC serial port communications.
- 2023-06-17 08:20:04下载
- 积分:1