为验证系统的Verilog设计

周立功Fusion StartKit，fpga开发板的实验例程，Flash Memory初始化RAM实验(ZLG Fusion StartKit, fpga development board test routines Flash Memory Initialize RAM experiments)

说明：  iic总线挂接在amba的apb总线上，标准接口，verilog代码的实现(iic bus attached to the amba' s apb bus, standard interfaces, verilog code implementation)

QUARTUSII 9.0 下的三级流水线中值滤波工程，vhdl源程序等。可用于fpga做图像预处理。(the three stage pipeline median filter project under QUARTUSII 9 , VHDL source program. which can be used by FPGA to do image preprocessing. )

一个用于锁相环开发的资料，请作为参考！-A phase-locked loop for the development of the information, please as a reference!

基于FPGA的OFDM的实现，Verilog语言。(OFDM based on FPGA,by Verilog)

说明：  通过循环读写DDR3内存，了解其工作原理和DDR3控制器的写法，由于DDR3控制复杂，控制器的编写难度高，这里笔者介绍XILINX的MIG控制器情况下应用，是后续音频、视频等需要用到SDRAM实验的基础。(Through reading and writing DDR3 memory circularly, we can understand its working principle and the writing method of DDR3 controller. Because of the complexity of DDR3 control, it is difficult to write the controller. Here, the author introduces the application of Xilinx's MIG controller, which is the basis of SDRAM experiment for subsequent audio and video.)

使用VERILOG开发时钟同步算法，能够从数据信号中提取时钟信息，(Clock synchronization algorithm using VERILOG developed to extract the clock from the data signal information,)

使用VHDL编写的分频程序,能进行任意次的偶数分频,程序简单易懂,供 初学者参考-prepared by the use of VHDL-frequency procedures can make even the random frequency, the procedures are simple and easy to understand. reference for beginners

vhdl programming from beginner level

说明：  SDIO 接口，实现SD卡的控制器功能，带有详细的注释(SDIO Interface,to realize the controller of SD Card,and have detail description.)