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cpu_design
FPGA MIPS架构CPU,五段流水线功能,ISE开发,verilog语言,可综合,模拟结果正确,内含设计报告(FPGA MIPS CPU, simple five-stage pipeline function, developed by ISE, using verilog language)
- 2020-12-03 13:09:25下载
- 积分:1
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RS译码的Euclid算法及其FPGA实现,并通过仿真器的出结果,对于设计RS译码很有帮助...
RS译码的Euclid算法及其FPGA实现,并通过仿真器的出结果,对于设计RS译码很有帮助-RS decoding Euclid algorithm and its FPGA implementation, and through the simulator results are helpful for the design of RS decoder
- 2022-08-20 11:45:06下载
- 积分:1
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dazhuankuai
基于FPGA设计的经典打砖块小游戏。游戏简单易玩。(FPGA design based on the classic Arkanoid game. Game easy to play.)
- 2013-11-26 09:40:37下载
- 积分:1
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cordic-algorithm
codic algorithm,which is used to calculate triangular functions
- 2014-12-25 16:44:36下载
- 积分:1
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gmii_tx_mac
实现千兆以太网数据发送,通过GMII接口向PHY写数据,控制PHY发送数据。(Implementation of Gigabit Ethernet data transmission, write data to the PHY through the GMII interface, control PHY data.)
- 2013-08-08 15:24:43下载
- 积分:1
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merry-go-round
能够成功的实现走马灯功能,使LED循环亮灭(To succeed the implementation of the version function, make the LED circular light out)
- 2013-06-13 22:45:50下载
- 积分:1
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Mano-CPU_VHDL-Implementation
Mano s cpu for Man s instructions
- 2012-04-28 01:04:57下载
- 积分:1
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basic_cpu_mano_ise_vhdl
morris mano basic vhdl code in ise
- 2014-01-13 05:52:01下载
- 积分:1
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FIR filter basic verilog code for implementation
FIR filter basic verilog code for implementation-FIR filter basic verilog code for implementation
- 2022-07-11 03:20:47下载
- 积分:1
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dadishu_v1
VHDL实现简单打地鼠游戏机,北邮数电实验(VHDL simple playing hamster games, BUPT number of electric experiment)
- 2020-11-03 13:29:52下载
- 积分:1