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SCAN_LED
基于EDA技术中的对LED扫描电路的实验,程序能成功运行,能直接在开发板上看实验结果(EDA-based LED technology to scan the experimental circuit, the program can run successfully, can see directly in the development of on-board results)
- 2009-06-05 11:49:53下载
- 积分:1
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this come from alter ,you can look and find it on line about jtag.
this come from alter ,you can look and find it on line about jtag.
- 2022-04-26 20:24:26下载
- 积分:1
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LTE
说明: 本文档对LTE进行了详细的介绍,是一本LTE入门的好书(This document is a detailed introduction to LTE, is a good book to get started with LTE)
- 2021-01-16 09:30:07下载
- 积分:1
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4x4 electronic locks central control system. Six input control.
4X4电子密码锁的中央控制系统。控制6位输入。-4x4 electronic locks central control system. Six input control.
- 2022-02-10 10:06:12下载
- 积分:1
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FSK调制通信系统的程序,比较实用,包括有限..
通信系统的FSK调制程序,比较实用,包括完整的工程-FSK modulation communication system procedures, more practical, including the complete works
- 2023-01-02 07:10:03下载
- 积分:1
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newViterbi217
基于IEEE802.11n标准,采用verilog语言设计的(2,1,7)卷积码viterbi译码器,支持1/2,2/3,3/4,5/6四种码率的译码,以测试无误(IEEE802.11n standard Verilog language design (2,1,7) convolutional code viterbi decoder support 1/2, 2/3, 3/4, 5/6 four bit rate decoding to test and correct)
- 2020-06-29 08:40:01下载
- 积分:1
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SimpleVOut-master
说明: SimpleVOut (SVO) is a simple set of FPGA cores for creating video signals
in various formats. The cores connect using AXI-streams. Most configurations
(resolution, framerate, colordepth, etc.) are set at compile-time using
Verilog parameters. See svo_defines.vh for details on those parameters.
- 2020-06-24 21:20:01下载
- 积分:1
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vhdl的一个串行序列信号发生器的设计与实现
vhdl的一个串行序列信号发生器的设计与实现-vhdl sequence of a Serial Signal Generator Design and Implementation
- 2022-04-24 02:34:50下载
- 积分:1
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Double_Pulse_Test
利用VHDL语言描述出一个双脉冲,可任意设置两脉冲长和中间时间间隔。(A double pulse is described in VHDL language, and the two pulse length and the intermediate time interval can be arbitrarily set.)
- 2020-11-22 12:29:35下载
- 积分:1
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project_zy
超声波测距程序 适用传感器HC-SR04(The application of sensor HC-SR04 for ultrasonic range finder)
- 2017-12-25 18:05:12下载
- 积分:1