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UVM
uvm验证方法学入门。step by step,适合IC验证人员入门(uvm verification methodology started. step by step, for IC verification personnel entry)
- 2015-04-05 23:14:20下载
- 积分:1
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digital scan conversion modules, the digital content can scan, which can also be...
数码扫描显示转换模块,可以对数码内容进行扫描,同时可进行转换-digital scan conversion modules, the digital content can scan, which can also be converted
- 2022-06-14 06:36:33下载
- 积分:1
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VGA altera detailed description of the official routine Verilog code for a very...
详细介绍了VGA官方例程Verilog代码,非常好很实用
- 2022-08-21 17:43:09下载
- 积分:1
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cpri
基于verilog的cpri接口代码,支持各种速率自由切换,量产产品实际应用代码(Cpri interface based on verilog code, support various rate free switch, production products the actual application code)
- 2015-09-21 16:59:59下载
- 积分:1
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IS611v25616在NIOS II 下的驱动
IS611v25616在NIOS II 下的驱动-NIOS II in IS611v25616 under the driver
- 2022-02-05 21:24:06下载
- 积分:1
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四人抢答器,已通过编译,仿真,包括抢答识别、计分、计时、数字显示等功能。...
四人抢答器,已通过编译,仿真,包括抢答识别、计分、计时、数字显示等功能。-Four Responder, has passed the compilation, simulation, including the answer in his identification, scoring, timing and digital display.
- 2023-08-16 08:05:03下载
- 积分:1
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ConvolutionWithViterbiDecoding
QPSK调制下的(5,7)卷积码的编码和维特比译码与BPSK调制下(5,7)卷积码的编码和维特比译码的BER特性(QPSK modulation under (5,7) convolutional code encoding and Viterbi decoding and BPSK modulation (5,7) convolutional code encoding and Viterbi BER characteristic)
- 2020-12-12 20:09:15下载
- 积分:1
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利用fpga实现的DDS,可输出正弦波,输出频率可调
利用fpga实现的DDS,可输出正弦波,输出频率可调-FPGA realization of the use of DDS, sine wave output, output frequency adjustable
- 2022-01-28 18:28:31下载
- 积分:1
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divisor
Time divisor vhdl code
- 2009-06-02 21:31:05下载
- 积分:1
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fpga 基于FPGA的mif文件创建与使用
fpga 基于FPGA的mif文件创建与使用-fpga FPGA-based mif file creation and use of
- 2022-02-06 23:23:12下载
- 积分:1