fpga 基于FPGA的mif文件创建与使用

基于FPGA的DDS信号源设计，32位相位累加器，产生可调频率(FPGA-based DDS signal source design, 32-bit phase accumulator to generate tunable frequency)

本程序用以驱动安捷伦频谱仪和脉冲信号发生器，以产生格雷码波形。(It is aim to driver the PSG and ESA to generate Golay.)

32-bit shifter, shifter, 32-bit.Very goog as a study file.

Wiggler Clone .JTAG Schematic and PCB in Altium Designer Format

基于FPGA的可控100进制可逆计数器，运行环境maxplus(Controlled 100 hex reversible counter FPGA-based operating environment maxplus)

这是一个基于Quartus2 开发环境的4输入加法器( 4adder basic on Quartus2)

用VHDL编写的串口通讯程序，包括几个不同的程序例子，也可以用verilog进行改写。()

vhdl编程语言电子书，英文的，有很多例子(VHDL programming language e-books, in English, there are many examples of)

一款非常实用的8051IPcore,本人现在做soc的控制部分就是它。(A very useful 8051IPcore, I now control part of the soc is doing it.)

verilog 我自己写得按单脉冲发生器，通过了综合和仿真，和频率可变的正弦波发生器，-verilog I write by a single pulse generator, through the synthesis and simulation, and variable frequency sine wave generator,