登录
首页 » VHDL » VGA altera detailed description of the official routine Verilog code for a very...

VGA altera detailed description of the official routine Verilog code for a very...

于 2022-08-21 发布 文件大小:720.14 kB
0 139
下载积分: 2 下载次数: 1

代码说明:

详细介绍了VGA官方例程Verilog代码,非常好很实用

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • shengyinchuli
    通过matlab对于声音进行处理,实现FFT,均值,方差,中值滤波,自相关分析,白噪声等处理(Matlab sound processing, FFT, mean, variance, median filtering, autocorrelation analysis, white noise and processing)
    2021-03-01 22:29:34下载
    积分:1
  • 这个免费的CPU
    This free cpu-ip! use verilog
    2023-07-21 16:20:04下载
    积分:1
  • mul
    实现有限域中乘法,输入二个普通二级制数,输出在本原多项式的乘法结果(Achieve limited multiplication field, enter the number of two-tier system of two ordinary output in primitive polynomial multiplication results)
    2014-01-12 22:52:38下载
    积分:1
  • verilog
    一些简单的Verilog代码,小例程,比如求平均值、七段数码管等等(Some simple Verilog code, small routines, such as averaging, seven digital tubes and so on)
    2016-12-12 10:02:20下载
    积分:1
  • SVPWM-VHDL
    fpga永磁同步电机矢量控制系统,包括死区等模块(fpga foc)
    2016-06-13 19:53:32下载
    积分:1
  • altera-de2-ann
    基于VHDL+FPGA的神经网络设计,实现简单的字符识别(Design of Neural Network Based on VHDL+FPGA to Realize Simple Character Recognition)
    2018-12-01 08:06:02下载
    积分:1
  • vhdl交通灯实验报告
    vhdl交通灯实验报告-VHDL traffic lights Experimental Report
    2022-02-13 04:55:13下载
    积分:1
  • 译码器,将八位输出转换为七段译码显示,相当于7448驱动译码管...
    译码器,将八位输出转换为七段译码显示,相当于7448驱动译码管-Decoder, the 8 output is converted to seven segment decoding shows that the equivalent of 7448
    2022-05-30 05:04:27下载
    积分:1
  • PCI-based--DSG
    基于PCI的数字信号发生器 关键词:PCI总线,PCI9054,FPGA,卡尔曼滤波器(PCI-based digital signal generator Keywords: PCI bus, PCI9054, FPGA, Kalman filter)
    2016-06-12 20:41:45下载
    积分:1
  • signal-processing-matlab
    信号处理中所用到的matlab程序,包括LFM,NLFM,BPSK,QPSK等等。(Matlab procedures used in signal processing, including LFM, NLFM, BPSK, QPSK, and so on.)
    2012-11-01 00:55:18下载
    积分:1
  • 696516资源总数
  • 106914会员总数
  • 0今日下载