利用fpga实现的DDS，可输出正弦波，输出频率可调

说明：  网口UDP的FPGA仿真代码，经过测试能够实现预想功能(etherneit udp verilog fpga code)

cordic implementation in vhdl&c

基于fpga的矩阵求逆运算，适用xilinx v6板卡(Inverse operation based on fpga matrix)

LATTICE FPGA FIFO 程序例程，工程详细，全部源代码上传 (LATTICE FPGA FIFO routine, detailed engineering, all source code uploaded)

说明：  Objects forming possible solution within original problem context are called phenotypes, their encoding, the individuals within the GA, are called genotypes. The representation step specifies the mapping the phenotypes onto a set of genotypes. Candidate solution, phenotype and individual are used to denotes points of the space of possible solutions. This space is called phenotype space. Chromosome, and individual can be used for points in the genotye space. Elements of a chromosome are called genes. A value of a gene is called an allele. Variation Operators The role of variation operators is to create new individuals old ones. Variation operators form the implementation of the elementary steps with the search space.

vhdl cpu芯片逻辑设计的一部分实现 只有一小部分 大家可以看一下 寄存器 加法器之类的(vhdl cpu chip logic design part of its implementation only a little part everry look and see b=about registers adder and so on)

液晶的控制，有VHDL语言实现-lcd control

利用Verilog语言中的函数调用实现阶乘运算的功能(Function calls use Verilog language implementation of the factorial function computing)

程序用VHDL实现： 利用一秒定时测量频率 并且显示，范围0~-VHDL 0~

四人抢答器，包括主持人清楚按键，抢答后屏蔽其他三人的继续抢答，同时答题时间开始，答题时间三档可调。时间到后蜂鸣器发声，指示灯亮起。