Controller RAM read and write, using verilog implementation of easy

显示频率测量，外接24MHz晶振，显示数据为三位，分四个档来测量-show frequency measurement, external 24MHz crystal oscillator, the data show that three, four hours to measure stalls

It is a example about LCD by VHDL code

本模块是实现格雷码和二进制码的转换，并给出仿真测试文件(This module is to achieve the conversion of Gray code and binary code, and give the simulation test file)

基于QuartusII环境下以模块化的形式做成的视频复合同步信号。-QuartusII-based environment to create the form of modular composite video sync signal.

HARIS角点检测Harris角点检测HARRIS CORENR探测器

加密已经成为我们生活的一部分，我们

说明：  Verilog HDL语言编写的32位程序计数器（PC）完整工程及相应仿真，QuartusII7.2下编译通过可正常使用。(Complete engineering and simulation of Verilog HDL language of the 32-bit program counter (PC), QuartusII7.2 compiled through normal use.)

ahb to apb master verification

通过代码控制音频编/解码硬件芯片WM8731， 通过按键控制音频输出的音量(Audio codec hardware chip WM8731 is controlled by code, and audio output volume is controlled by keys.)

SPARC Assembly Language Reference Manual