Controller RAM read and write, using verilog implementation of easy

vhdl 计数器源程序，大家看看吧 vhdl 计数器源程序，大家看看吧-vhdl counter source, we see it vhdl counter source, we see it

Real time Clock DS1307 interacing with PIC using I2C.

用verilog写的CORDIC算法实现，很适合做超越函数的运算。通常用于实现正弦乘法，或者坐标变换。-The cordic arithmetic implemented by verilog is adapted to exceed function.It is usually used to implement sine multiplication or coordinate tuansform.

该模块采用cordic算法计算正弦和余弦，并采用参数化方式实现。 ；包中存在其他模块。

采用vhdl语言实现12路的pwm波控制。-Language implementation using vhdl wave pwm control of the road 12.

一个任意整数分频程序,采用VHDL语言编写，编译通过-An arbitrary integer frequency procedure for the VHDL language, the compiler through

verilog写的LnE算法，可用于计算指数和对数(Verilog written in LnE algorithm, can be used to calculate the index and the logarithm)

Vhdl实现计算exp功能 在apex20k上经过验证-Vhdl achieve in terms exp function on proven apex20k

FPGA编写的三角波发生器，可以产生100HZ～500KHZ以上的三角波，波形稳定(FPGA prepared triangular wave generator, can produce more than 100HZ ~ 500KHZ triangle wave, waveform stability)