Vhdl实现计算exp功能 在apex20k上经过验证

使用verliog实现ps2键盘接口的驱动，通过altera cyclone 第四代验证通过(Use verliog implement ps2 keyboard interface driven by a fourth-generation verified by altera cyclone)

光栅尺的四细分和辩向电路，并具有计数器功能，利用Quartus综合，可以参考-Grating four segments and the dialectic to the circuit, and have counter functions, using Quartus integrated, can refer to

mdio配置BCM5461，实现PHY初始化及通信相关寄存器的配置(mdio configure PHY)

基于FPGA的温度计源代码，VHLL语言-Thermometer-based FPGA source code, VHLL language

异步的fifo,写时钟和读时钟相互独立，能够对数据进行缓存处理。希望对大家有用(Asynchronous fifo, write clock and the read clock independent of each other, capable of processing the data cache. I hope useful)

verilog 代码. 经验证成功,可以作为标准单元库,为FPGA设计者使用.-Verilog code. Certified success, as a standard cell library for the use of FPGA designers.

这篇是利用VHDL语言控制LCD1602芯片来显示时钟的简单代码。LCD1602顾名思义是一种02*16，即为两行十六列的液晶显示屏，液晶两行，每行可以显示16个字符，但是CGRAM及CGROM里面一共有160个字符，包括阿拉伯数字，英文字母大小写，常用符号及日文。每个字符对应于一个ASCII码值，在液晶显示屏上显示对应的字符时候，只需要将对应的ASCII码写到DDRAM中就好。

说明：  Digital pre-distortion (DPD) is an advanced digital signal-processing technique that mitigates the effects of power amplifier (PA) nonlinearity in wireless transmitters. DPD plays a key role in providing efficient radio digital front-end (DFE) solutions for 3G/4G basestations and beyond. Modern FPGAs are a promising target platform for the implementation of flexible wireless DFE solutions, including DPD.

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说明：  ADV7179芯片的驱动程序，基于FPGA硬件实现，已经验证可以使用(ADV7179 chip drivers, FPGA-based hardware implementation has been verified using)