CODE_VHDL_INITIALIZING 在 2 线液晶显示，你可以打开/关闭液晶屏 (KHỞI TẠO HIỂN THỊ 2 HÀNG 液晶电视 VÀ CÓ THỂ TẮT/MỞ 液晶屏)

这是用 vhdl 语言编码的可重构的 fir 滤波器设计 fir 滤波器的实现代码

说明：  STM32F103 ADC 通过DMA进行读取(STM32F103 ADC reads by DMA)

VERILOG设计实例，非常详细的例子，有交通灯，频率计，数字跑表等等例子(Verilog design example, a very detailed examples have traffic lights, frequency meter, digital stopwatch, etc. Examples of)

吠陀复用代码执行乘法的4位和8位使用进位选择加法器

说明：  一个具备bp协议典型功能的数据传输系统（超时重传机制以及托管传输）包含五个节点(A data transmission system with typical functions of BP protocol (Overtime retransmission mechanism and managed transmission) consists of five nodes)

基于FPGA 16QAM解调verilog代码，(16QAMdemoluator veriliog)

cvery high compatibles for quartus

这是fpga按键消抖的源代码，在很多fpga按键实验中都可以用到，能够进行代码移植。(This is the source code of the FPGA buttons, in many FPGA key experiments can be used, and can carry out code.)

altera公司cpld的原理图库(protel格式)-sch.lib about altera s cpld.

通过正弦波和三角波的比较产生SPWM波形(Through the comparison of sine wave and triangle wave produces SPWM waveform)