VERILOG HDL 实际工控项目源码 开发工具 altera quartus2

An FPGA Implementation of a HoG-based Object Detection Processor

利用verilog驱动LCD1602 本实验是用LCD1602显示英文。（LCD带字库）(//Use verilog driver LCD1602// video tutorial for all of us 21EDA e-learning board// The experiment is LCD1602 display in English. (LCD with font))

de2-115引脚的配置，quartusII的设置(de2-115 configuration pins, quartusII settings)

用Verilog实现的 哈佛结构的简单指令集CPU程序，由ALU、地址译码器、指令译码器等部分组成(Part of a simple instruction Verilog realize the Harvard architecture CPU program set by the ALU, address decoder, an instruction decoder, etc.)

isa MEMORY PLAN eu biu asm

FPGA开发,DE2开发板上实现,从SD卡读出MP3文件并播放,(即是开发一个简单的MP3播放器)(FPGA development, DE2 development board realize, from the SD card to read out and play MP3 files, (that is, the development of a simple MP3 player))

说明：  基于EasyFPGA030的四位数字密码锁。(Based on the four-digit lock EasyFPGA030.)

单相混合有源电力滤波器的设计与控制，在matlab中的仿真模型，功能效果很好。(The design and control of single-phase hybrid active power filter in matlab simulation model, the function works well.)

verilog语言写的一个四层电梯程序，有优先级的判断。(verilog language of a four-story elevator procedures to determine priority.)

非常多的verilog实例，对于刚入门者比较有用-lot of verilog example, just beginners more useful