ADC TLC5510的测试程序，经过测试是非常简单和容易的

Parallel to Serial converter Module

ASK调制信号的verilog VHL设计，在ise中实现了ASK信号的调制解调。(ASK modulation signal verilog VHL design, in ise to achieve the ASK signal modulation and demodulation.)

FPGA实现FFT算法的源代码及工程文件，此工程为ISE工程项目。有详细的说明，可以运行。(FPGA Implementation of FFT algorithm source code and project files, this works for the ISE project. There are detailed instructions, you can run.)

VHDL实现了IIS接口程序，在Quartus II 6.0上编译通过，在板子上可以读取IIS数据-IIS VHDL interface procedures, the Quartus II 6.0 compiled by the board can read data IIS

SPH的原始代码，希望可以帮到大家啊关于模拟poiseuille的(simulate poiseuille fuild)

基于quartus 的一些程序 都是verilog 还是比较有用的 -Based on some of the procedures Quartus Verilog are still quite useful

使用verilog语言描述的二阶巴特沃斯IIR滤波器，程序中有参数说明，已经运行通过(Using verilog language to describe the second-order Butterworth IIR filter, the program has parameter description has been run through)

Firmware setopbox Ali3329B

高级FPGA设计__结构、实现和优化,中文翻译版(Advanced FPGA Design- Architecture, Implementation, and Optimization)

FIFO程序，适用FPGA仿真的代码，有一定的价值-FIFO