一种新的FIFO实现方法,verilog描述，通过modelsim 6.0 仿真，Quartue综合...

vhdl 实现fpga 闪灯控制 流水线闪灯 还用signalTAP进行检测，给初学者参考(vhdl fpga flash control lines to achieve flash is also used signalTAP testing, to advanced users)

说明：  通过监测工作状态实现带有IIC通讯功能的数据发送接收(to implement the sending and receiving data function of iic communication )

interruption routine for PIC16F877

实现PWM波型....使用VHDL语言-Realization of PWM waveform using the VHDL language ....

本CD-ROM包括《Verilog-HDL实践与应用系统设计》一书中的全部例子，这些例子全部通过了验证。第七章以后的设计实例，不仅有Verilog-HDL的例子，也附了包括VB、VC++等源程序,甚至将DLL的生成方法也详尽地作了说明。 -the CD-ROM include "Verilog-HDL Practice and Application System Design," a book the whole Examples of these examples were passed certification. After the seventh chapter, a design example is not only Verilog-HDL example, the report include VB, VC and other source files, even DLL generator also described in detail.

基于Verilog的FPGA设计时序分析约束详细解释与使用方法(FPGA timing constraints)

说明：  PID算法用verilog语言实现，实测可用，由三个模块组成(The PID algorithm is implemented in Verilog language. The actual measurement is available. It consists of three modules.)

vhdl,无进位同步计数器，完成6进制加，输出6进制序列数-vhdl, non-binary synchronous counter to complete the six binary Canada, output 6, the number of binary sequences

Xilinx FPGA moving data across asynchronous clock boundaries

vhdl program of matlab file converted to vhdl