Elevator designed to control the lift design 6 original VHDL language

交通灯控制器，verilog，可控制两个方向各四盏灯的亮灭，并具有时间显示(traffic light controllor，by verilog)

利用QuartusⅡ6.0对所设计的出租车计费器的VHDL代码进行仿真，并在FPGA数字实验系统上实现了该控制。(The Quartus II 6 is used to simulate the VHDL code of the designed taxi billing device, and the control is realized on the FPGA digital experiment system.)

这是一个基于VHDL语言编程的电子琴源代码程序，希望可以帮到大家-This is a keyboard based on the VHDL programming language source code program, the desire to help everyone

VHDL实现SPI接口转I2c接口的源代码，可以直接调用-VHDL realize I2C interface SPI interface to the source code, you can directly call

Qutuas II v7.1的key_gen 对sp1无效 这就是个v7.1 sp1的key_gen -Key_gen the Qutuas II v7.1 for sp1 invalid This is the v7.1 sp1 months key_gen

DDR SDRAM控制器verilog代码及中文说明文档(DDR SDRAM Controller Using Virtex-5 FPGA Devices)

一个可以把信号拉长任意个CLk的VHDL源码例子。详见说明文档-A signal can be stretched any one CLk the VHDL source code examples. See documentation

数字滤波器包含IIR数字滤波器和FIR数字滤波器。本设计的工作主要是Labview软件部分，包括信号生成模块、滤波模块、显示模块的设计(IIR digital filter comprises a digital filter and FIR digital filters. The design work is mainly Labview software parts, including signal generation module, filter module, display module design)

基于FIPS 180-4标准的SHA-1算法的verilog HDL实现，分模块分别实现(FIPS 180-4 standard SHA-1 algorithm-based verilog HDL sub-modules, respectively, to achieve)

cy68013 vhdl code and usb high speed