用 vhdl 实现的 nand 闪存

verilog产生高斯白噪声，gwn_en信号产生使能，gdata是幅度服从高斯分布，功率谱密度为定值的高斯白噪声序列，共10位（现实中只能够做到带限，跟dac输出带宽有关，我的系统只能做到300kHz）(verilog Gaussian white noise, gwn_en signal enabled, gdata amplitude Gaussian distribution, power spectral density of white Gaussian noise sequence value, a total of 10 (in reality can only be band-limited, with dac output bandwidth related, My system can do 300kHz))

VHDL USB2.0接口源码,内有说明,详细.-VHDL USB2.0 interface source code, which is described in detail.

网上流传的用来实现FPGA驱动VGA，从而实现一个pingpong小游戏的源码，实测可用。(a program embedded in a FPGA in order to drive the VGA and realize a little game named pingpong. tested.)

这是篇<基于FPGA 的OFDM 宽带数据通信同步系统设计与实现>, 觉得甚是有用，大家共同学学。(This is the article <FPGA-OFDM-based broadband data communication systems design and implementation of synchronous> that even be useful, we all learn together.)

数字秒表的实现，我还写个具体的过程要求等，(there is function of clock,it very useful)

这是一个计算器的Verilog代码，可实现加减乘除等基础功能(calcultor for you to do some reserches.)

实现基于FPGA的vga显示，亲测能编译得过，不同开发版应该要相应改动（PS: 不太了解）

用vhdl实现ps2鼠标的源程序-achieved using VHDL source ps2 mouse

EDA应用中RAM具体定义实例，供大家学习和写程序参考之用-EDA applications, examples of the specific definition of RAM, for everyone to learn and write programs for reference

用verilog实现dsp与Fpga接口的同步设计，其功能包括读写操作及四个功能模块，采用两个fifo实现不同时钟域的地址与数据的转换，在quartus ii11.0环境下运行，运行此程序之前需运行将调用fifo。(Dsp using verilog achieve synchronization with Fpga interface design, its features include read and write operations and four functional modules, using two different clock domains to achieve fifo address and data conversion in quartus ii11.0 environment to run, run this program required before running calls fifo.)