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bjgm
四间隔频率变化,并循环输出50~51ms之间的频率。(Four-interval frequency changes and the cycle between 50 ~ 51ms output frequency.)
- 2008-08-21 11:46:20下载
- 积分:1
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ALTERA NIOS处理器实验,编程环境是QUARTUS,在NIOS SHELL下编译实现功能。实验USB接口...
ALTERA NIOS处理器实验,编程环境是QUARTUS,在NIOS SHELL下编译实现功能。实验USB接口-Altera NIOS processor experiments, programming environment is QUARTUS in NIOS SHELL compiler functionality. Experimental USB interface
- 2022-05-25 15:09:52下载
- 积分:1
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Sensor_CMOS
Code to controlling a Image sensor - CMOS(Code to controlling a Image sensor- CMOS)
- 2009-11-13 03:02:36下载
- 积分:1
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Verilog-design-and-identify-book
找到这本书的完整版了。呵呵,贴出来和大家共享。这是本好书,我买了一本作为Verilog的参考书。这本书语法部分集中,便于查阅,此外讲了很多实用的设计思想。最重要的是本书薄,可以完整看完。强烈推荐。
(如果只是查阅,电子版就可以,如要完整学习,建议还是买纸质版的)(Find the full version of this book. I posted and share. This is a good book, I bought a reference book as Verilog. Syntax in this book section focuses on ease of reference, in addition to speaking a lot of useful design ideas. The most important thing is that the book is thin, you can complete reading. Highly recommended. (If you only access the electronic version to complete learning, suggestions or to buy the paper version))
- 2012-06-07 21:58:19下载
- 积分:1
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ALTERA_FPGA_SDRAM
使用ALTERA的FPGA控制SDRAM的verilog程序(Use ALTERA s FPGA to control SDRAM s verilog program)
- 2017-03-30 00:31:53下载
- 积分:1
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fpga DDS ROM数据正弦波形正半周采样程序
fpga DDS ROM数据正弦波形正半周采样程序-fpga DDS ROM sinusoidal waveform is a half weeks of data sampling procedures
- 2022-03-09 21:09:04下载
- 积分:1
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ds1302_seg7
使用Verilog完成DS1302的驱动,工程已经经过测试,可直接使用。(DS1302 using Verilog complete drive, the project has been tested and can be used directly.)
- 2014-12-10 15:27:48下载
- 积分:1
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层合板刚度
层合板的刚度的计算和验算,包括拉伸刚度A、弯曲刚度D以及耦合刚度B。
首先要给定层合板的各个参数,具体有:层合板的层数N;各单层的弹性常数E1、E2、 、G12;各单层对应的厚度;各单层对应的主方向夹角 。(The stiffness of laminated plates is calculated and checked, including tensile stiffness, A, flexural stiffness, D and coupling stiffness B. First of all, it is necessary to give the parameters of laminated plates, such as the number of plies N, the elastic constants of each layer, E1, E2, and G12, the thickness of each monolayer, and the angle of the main direction corresponding to each single layer.)
- 2021-01-18 09:28:43下载
- 积分:1
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comp
The red arrow showed the output became 8 when the measured temperature changed to 11°C. As shown by black arrow, the maximum output was 28. The program was run according to the proposed method.
- 2012-06-05 23:16:25下载
- 积分:1
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通信基带信号发生器的设计,采用单片机输入频率和波形,在FPGA中实现频率和波形生成...
通信基带信号发生器的设计,采用单片机输入频率和波形,在FPGA中实现频率和波形生成-Communications base-band signal generator design, the use of single-chip input frequency and waveform, in the FPGA to achieve the frequency and waveform generation
- 2022-03-14 12:44:53下载
- 积分:1