xilinx CTC IPcore(encoder 和 decoder)的测试，经过AWGN信道。

MBD-FPGA数字滤波器设计基本流程,基于DSP builder(MBD-FPGA basic process of digital filter design)

turbo码的编码程序,verilog HDL,在ISE环境中(turbo code encoding process)

基于xilinx公司的SPARTAN6系列芯片的高速全双工串行收发器(high-speed transceiver based on spartan 6 of Xilinx PFGA)

超級好用 25M~100HZ的除頻器 寫了好久 超級實用 歡迎下載(Super easy to 25M ~ 100HZ of divider wrote a long time super practical welcome to download)

AMBE2000的压缩数据输出输入的Verilog代码，实现了自回环（loopback）效果. 希望对学习verilog语言的同学有所帮助。(The Verilog code of AMBE2000. input and output of compressed data to achieve a self-loop (loopback) effect. hope to help the one who is studying the verilog language.)

一段很好地讲述PWM的VHDL硬件代码，可以在不同SOPC上运行实现

可测试74LS00，74LS01，74LS02，74LS03等等芯片的功能是否正常。

hdlc协议的封装与解析，fsc校验，完整的例程代码(Decode and Encode an HDLC packet ，using FCS16 calculation)

Mini AES Advanced Encryption Standard (AES) implementation with small area/resources utilization. Features - Encryption and Decryption unit in single core.

本程序主要是实现xinlinx fpga与dsp之间的双工通信(This program is to achieve duplex communication between xilinx fpga and dsp)