vhdl数据通路

高速FIFO，verilog设计。速度高达130Mhz(High-speed FIFO, verilog design. Speed up to 130MHz)

说明：  pc与fpga之间通过千兆以太网交换机实现网络通信(Network communication between PC and FPGA via Gigabit Ethernet switch)

这是个双端口双端口ram的定义，当然读者在此基础上还可以扩充(This is a dual-port dual-port ram definition, of course, on the basis of the readers can also be expanded)

基于FPGA数字频率计，VHDL，quartus，8位频率显示，精确度高

AD9268的配置Verilog实现，程序用于实现4通道的AD9268的配置(The 4 channel AD9268 configuration)

基于COMTEX-M3的IEEE1588,irigB对时的源程序，包括GPS对时程序，并将对时的结果写入FPGA中(Based COMTEX-M3 of IEEE1588, irigB on time source, including GPS for the program, and writes the results when the FPGA)

usb3.0 物理层仿真，verilog编程(Start the physical simulation)

用于FPGA实现单总线测温电阻DS18b20时序。在xilinx spartan 3中试过。-failed to translate

浮点数 矩阵乘法模块 verilog语言编写 可直接调用(Floating-point matrix multiplication module can directly call verilog language)

ATSHA204_S加密芯片资料，学习使用该芯片必读资料(ATSHA204_S encryption chip data, required reading for learning to use the chip)