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uart
Verilog UART is written in this file
- 2013-04-16 12:34:05下载
- 积分:1
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上海外滩看到的最大的LED显示屏的内核源代码,主要是完成视频信号的远距离传输的编解码与接口转换...
上海外滩看到的最大的LED显示屏的内核源代码,主要是完成视频信号的远距离传输的编解码与接口转换-Shanghai Bund to see the largest LED display in the kernel source code, mainly to complete the long-distance video signal transmission codec conversion and interface
- 2022-01-25 18:54:47下载
- 积分:1
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任意基数分频VERILOG代码,经过了编译,可以修改数字改变分频。...
任意基数分频VERILOG代码,经过了编译,可以修改数字改变分频。-Arbitrary base frequency Verilog code, after compilation, the figures can be amended to change the frequency.
- 2022-08-10 12:37:41下载
- 积分:1
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master and slave code
集成电路的规模日益扩大
- 2022-03-02 13:07:25下载
- 积分:1
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my
说明: 64位数据的CRC-32校验的,Verilog实现,算法并行优化(64-bit data CRC-32 checksum, Verilog implementation of a parallel optimization algorithm)
- 2011-09-17 19:36:16下载
- 积分:1
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AD9826
AD9826中文说明书 ,对于学习AD9826元件有很大的帮助。(AD9826 Discription in Chinese)
- 2015-04-12 14:22:34下载
- 积分:1
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amba3-vip-master
说明: All AMBA bus protocols - AXI3, AXI4, AXI4-Lite, ACE, AHB
- 2021-01-11 10:08:49下载
- 积分:1
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High
高速多通道crc实现,可以并行实现5个通道数据的校验,支持10GB以太网标准-High-speed multi-channel crc implementation, can be achieved in parallel 5-channel data validation, support for 10GB Ethernet standard
- 2022-07-18 13:13:37下载
- 积分:1
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计算机组成原理课程设计(vhdl语言实现)
1. 一位全加器设计
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY add IS
PORT(a,b,cin:IN STD_LOGIC;
Co,S:OUT STD_LOGIC);
END ENTITY add;
ARCHITECTURE fc1 OF add is
BEGIN
S
- 2023-06-03 00:55:02下载
- 积分:1
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flash_programming
主控cc2530通过debug接口对目标cc2530进行程序烧写,使用DMA进行数据传输,已调试通过。(Master cc2530 through the debug interface for writing the program to target cc2530, using the DMA data transfer, has been work successful.)
- 2011-08-21 23:42:58下载
- 积分:1