用VHDL写的一个显示程序，希望能帮上大家的忙，嘿嘿。

如果不考虑占空比，直接利用计数器来进行分频，则占空比会发生变化。下面程序实现1：1的三分频。-if not duty cycle directly counter to the use of sub-frequency, duty cycle will change. Below a program : a third of the frequency.

micron公司提供的控制器，很具有参考性质，用flash的童鞋可以下载参考，含有ECC功能

数字ic设计，二级缓存，格雷码，深度256，(Digital IC design, two level cache, gray code, depth 256.)

FIFO的VERILOG代码编写 可综合的Verilog FIFO存储器(The VERILOG code FIFO write comprehensive Verilog FIFO memory)

MODELSIM的实验程序，在QUARTUSii中调用MODELSIM，实现仿真-ModelSim Experimental procedures QUARTUSii call MODELSIM, realize Simulation

常见的几种电机的特征与控制方法-Several common characteristics of the motor and control method

完成交通灯的所有功能，已经通过验证。希望大家多多指教。(Completion of all the features of traffic lights, have been authenticated. Hope the exhibitions.)

用FPGA，基于M88E1111芯片实现的TCP/IP协议的千兆网，将协议封装成IP核(With the FPGA, the TCP/IP protocol based on the M88E1111 chip is used to encapsulate the protocol into IP core)

说明：  Xilinx 公司Spartan-6系列FPGA实现LVDS，带Modelsim仿真文件，已综合。(Xilinx Spartan-6 Series FPGA implements LVDS with Modelsim simulation file, which has been synthesized.)

说明：  1. REVISION HISTORY 2. OVERVIEW 3. SOFTWARE TOOLS AND SYSTEM REQUIREMENTS 4. DESIGN FILE HIERARCHY 5. INSTALLATION AND OPERATING INSTRUCTIONS 6. SUPPORT