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FSK
频移键控FSK的Verilog实现,带测试文件,并在FPGA开发板上成功验证(Frequency Shift Keying FSK the Verilog implementation, with the test file, and successfully verified in FPGA development board)
- 2020-09-03 11:28:07下载
- 积分:1
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Crack_QII_13.1_Windows
采用骏龙科技这个13.1新版本破解器.对于已经用了老版本破解器的网友,请把bin和bin64下的sys_cpt.dll删除,然后把sys_cpt.dll.bak名字改成sys_cpt.dll,也就是先恢复正版,然后用这个破解器破解。注意老的license文件也要删除,改用这个新版本破解器附带的license(Cytech Technology 13.1 using the new version of this cracker. Has been used for the old version cracker users, please sys_cpt.dll bin and bin64 under Delete, and then changed the name of the sys_cpt.dll.bak sys_cpt.dll, which is first restore genuine, then use this cracker to crack. Note that the old license file should be deleted in favor of this new version of the license that came with crack)
- 2021-03-04 09:59:32下载
- 积分:1
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61EDA_B79
书名:LDPC原理与应用。是国内第一本介绍用LDPC编、译码基本原理及应用技术的一本书。对用 vhdl 或verilog实现硬件编程LDPC的人开发无线通信是很好的资料(Title: LDPC Principles and Applications. Is the first book describes using LDPC Encoding and Decoding the basic principles and application of technology, a book. Right to use vhdl or verilog hardware programming LDPC people to achieve development of wireless communications is a very good information)
- 2009-10-30 10:36:35下载
- 积分:1
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一三FFT变换(头:这是一个代码3)
fft变换三个中的一个(站长:三个代码算一个)-fft transformation of a three (head : It is a code 3)
- 2022-08-10 18:57:06下载
- 积分:1
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VHDL开发的计数器。源程序不复杂,应该都能看懂。最重要的注意:是时序问题
VHDL开发的计数器。源程序不复杂,应该都能看懂。最重要的注意:是时序问题-VHDL development of the counter. Source code is not complicated, should be able to understand. The most important Note : Timing is the issue
- 2022-05-14 00:07:18下载
- 积分:1
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key_debounce-source-code
这是fpga按键消抖的源代码,在很多fpga按键实验中都可以用到,能够进行代码移植。(This is the source code of the FPGA buttons, in many FPGA key experiments can be used, and can carry out code.)
- 2015-10-31 10:19:03下载
- 积分:1
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采用VHDL编写的七段数码管显示程序
采用VHDL编写的七段数码管显示程序-prepared using VHDL paragraph 107 of the procedures Digital Display
- 2022-07-28 16:14:18下载
- 积分:1
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pngenerator
pngenerator的vhdl代码。我们可以在cdma的fpga实现中使用它;
- 2022-10-01 04:45:03下载
- 积分:1
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CPLD drives with digital control, of from 0000 to 9999, digital control is a dyn...
用CPLD驱动数码管,实现从0000计到9999,数码管是用动态显示,程序用VERILOG完成的-CPLD drives with digital control, of from 0000 to 9999, digital control is a dynamic display, the program completed with VERILOG
- 2022-05-23 09:34:50下载
- 积分:1
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demo
NiosII的C代码,包括网卡,lcd,usb,串口,按键.(NiosII C code, including network cards, lcd, usb, serial, key.)
- 2013-07-19 11:17:29下载
- 积分:1