基于NiosⅡ的2 de2_tvproject

xilinx FPGA 与高速ADC LVDS接口的范例程序(xilinx FPGA ADC LVDS interface)

Verilog 黄金参考指南是 Verilog 硬件描述语言及其语法 语义 合并以及将它应用到硬件设计的一个简明的快速参考指南。(Verilog Golden Reference Guide is a concise and fast reference guide for Verilog Hardware Description Language and its syntax and semantics merging and its application to hardware design.)

异步FIFO 输入: 16bit 输出:16bit 深度:256(Asynchronous FIFO Input: 16bit Output: 16bit Depth: 256)

VHDL语言的cookbook,能够使你更快的学会使用VHdL-cookbook

说明：  FFT 1024 point, in 10 state

11 阶FIR 数字滤波器,verolog描述，通过modelsim 6.0 仿真，Quartue综合-11-order FIR digital filter, verolog description, modelsim 6.0 through simulation, Quartue integrated

ad9850函数发生器 MSP430单片机驱动程序 扫频 DDS(AD9850 DDS)

VHDL的动态扫描显示六个数码管，包含分频代码产生25kHz的扫描信号作为时钟。(VHDL dynamic scanning display six digital tube contains 25kHz scanning signal is generated as a clock divider code.)

4X4 KEYPAD 的输入位数计数器，可以自己定义输入的位数-4x4 KEYPAD median counter input, input their own definition of the median

利用Verilog语言中的函数调用实现阶乘运算的功能(Function calls use Verilog language implementation of the factorial function computing)