256 点的 IFFT 执行的设计与实现

数字信号处理的FPGA实现(第4版)的配套源码，极具参考价值。(The source code of the realization of digital signal processing on FPGA (4th edition) is of great reference value.)

利用VHDL语言实现8位到32位的双向数据转换-use VHDL 8-32 two-way data conversion

ＡＤ转换代码，主要练习，没有具体的功能可以实现的，因为只是一部分(AD conversion code, practice, no specific function can be realized, because only part)

说明：  基于FPGA的1553b接口设计详细设计论文(1553B design based on FPGA)

基于DE2开发板的VGA显示模块，仅供大家参考(DE2 development board based on the VGA display module, for your reference)

misp，五级流水源码，实现一个建议的cpu(Misp, five-stage flow source code, implementation of a recommended CPU)

说明：  本光盘是《数字信号处理FPGA实现》一书的配书光盘，内容包括了书中第二章给出的所有示例以及该书的12个实验完整的工程文件。 本光盘根目录下有3个文件夹，分别为dsp48_application,dsp48e_application和DSP_Example。(This CD-ROM is the CD-ROM of the book "FPGA implementation of digital signal processing". It includes all the examples given in Chapter 2 and the complete engineering documents of 12 experiments in the book. There are three folders in the root directory of this CD-ROM, which are dsp48_ application,dsp48e_ Application and DSP_ Example.)

基于fpga的多功能数字时钟的实现，已经编译过了，绝对可行-fpga-baseed clock

TASKS OF TWO TYPES CAN BE RUN FOR EVERY 2 MIN.

说明：  HDB3编码Quartus2 10.0的工程，modelsim仿真，有实物图、仿真图以及源程序，适合做通信原理课程设计的同学参考使用(HDB3 encoding Quartus2 10.0 project, modelsim simulation, there are physical map, simulation diagrams and source code, suitable for students of communication theory courses designed for reference use)