VHDL实现ALU的源代码，并且提供了一个详细的testbench！

文章运用分级抽取和多相滤波的方法改进传统CIC滤波器的结构,降低了系统工作频率,运用幅度改进函数(ACF)和外加级联余弦预滤波器的技术改进了滤波器频率响应,提出了一种高效的算法结构,改善了通带损耗,增大了阻带衰减,对CIC滤波器的实际应用和深入研究有着现实意义。 (Article the use of hierarchical multi-phase extraction and filtering methods to improve the structure of the traditional CIC filter, reducing the system operating frequency, the use of margin to improve the function (ACF) and the cosine cascade plus pre-filter technology to improve the filter frequency response, the an efficient algorithm to improve the pass-band loss, increases the stopband attenuation of the CIC filter in practical applications and in-depth study has practical significance.)

基于FPGA的波束形成，包括ad转换，数据存储等部分。。(FPGA-based beamforming, including ad conversion, data storage and other parts. .)

基于System Generator的图像处理工程,多媒体处理FPGA实现的源码,图像形态学部分,腐蚀,膨胀,细化算法(System Generator based image processing engineering, multimedia processing FPGA implementation source code, image morphology section, corrosion, swelling, thinning algorithm)

dpim是光通信中使用的一种调制方式，这里提供的是它的环回代码，自己可以根据需要拆开了下载到两块板子上。(dpim is used in an optical modulation, here is its loop-back code, they can download needed two apart on the board.)

基于FPGA的7x7块交织器设计，程序分交织、解交织两部分，并在QUARTUS II 9.0 下仿真通过，内附模块详细端口说明及仿真分析文件。

verilog coding for butterworth filter with cut off frequency with 500hz

this program is a simulation for Aloha

基于alteraCPLD芯片的VHDL点阵滚动显示源代码-VHDL-based alteraCPLD chip dot matrix rolling display the source code

THIS IS A SOURCE CODE FOR LIFT IN VHDL LANGUAGE

基于FPGA的Verilog语言实现的六十进制计数器(FPGA-based Verilog language implementation of six decimal counter)