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RiscCpu
Verilog-RISC CPU
- 2008-11-30 22:05:57下载
- 积分:1
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dec2_4
decoder 2-4
digital core
- 2016-05-20 03:50:28下载
- 积分:1
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BBTHG_II_t_x
KDP晶体二倍频与三倍频;基于耦合波方程组;已于实验结果校核 (Sum Frequency in KDP)
- 2021-03-16 11:39:21下载
- 积分:1
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第七次课--视频图像DCT处理及水印嵌入_2
说明: 熟悉IIC协议总线协议,采用IIC总线对图像采集传感器寄存器进行配置,并转换为RGB565格式。
利用异步FIFO完成从摄像头输出端到SDRAM 和SDRAM 到VGA 接口各跨时钟域信号的传输和处理。
利用 SDRAM 接口模块的设计,实现了刷新、读写等操作;为提高SDRAM 的读写带宽,均采用突发连续读写数据方式;并采用乒乓操作实现 CMOS 摄像头与VGA的帧率匹配。
利用双线性插值方法实现对图像640×480到1024×768的放大操作。
完成VGA显示接口设计。(Familiar with IIC protocol bus protocol, IIC bus is used to configure the register of image acquisition sensor and convert it into RGB565 format.
Asynchronous FIFO is used to transmit and process signals across clock domain from camera output to SDRAM and SDRAM to VGA interface.
With the design of SDRAM interface module, refresh, read and write operations are realized. In order to improve the read and write bandwidth of SDRAM, burst continuous read and write data mode is adopted, and table tennis operation is used to achieve frame rate matching between CMOS camera and VGA.
The bilinear interpolation method is used to enlarge the image from 640*480 to 1024*768.
Complete the VGA display interface design.)
- 2020-06-25 04:00:02下载
- 积分:1
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top
说明: FPGA程序的top.v文件,主要实现DDS信号发生器功能,通过定时器,可简单实现输出幅值无极跳变(FPGA procedures top.v documents, the main function of DDS signal generator, through the timer can be simple to achieve the output amplitude wuji hopping)
- 2008-12-05 16:18:28下载
- 积分:1
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FPGA 智能车
智能小车的FPGA程序,能实现小车的前进,后退,转弯,使得小车走一个正方形后停止下来,程序采用vhdl硬件描述语言。
智能小车的FPGA程序,能实现小车的前进,后退,转弯,使得小车走一个正方形后停止下来,程序采用vhdl硬件描述语言。
智能小车的FPGA程序,能实现小车的前进,后退,转弯,使得小车走一个正方形后停止下来,程序采用vhdl硬件描述语言。
- 2022-12-31 15:55:04下载
- 积分:1
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4-16.doc
4-16译码器,用VHDL编写的,可以直接下载到可编程逻辑器件中(4-16 decoder, written with VHDL, can be directly downloaded to the programmable logic device)
- 2010-11-24 15:13:14下载
- 积分:1
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ds18b20
verilog编写的ds18b20温度传感器程序,可综合(ds18b20 program written in verilog)
- 2020-10-29 10:29:56下载
- 积分:1
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TrafficLight
利用Verilog编写一个交通灯控制电路,能控制两条路上红、黄、绿灯的变化,并且显示等待时间(Using Verilog HDL to design a traffic light control circuit. It can control the change of red, yellow and green lights on two roads, and display the remaining waiting time.)
- 2018-11-22 23:07:33下载
- 积分:1
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8位大小比较器
说明: 8位大小比较器的VHDL源代码,Magnitude Comparator
VHDL description of a 4-bit magnitude comparator with expansion inputs(eight compared with the size of the VHDL source code, Magnitude Comparator VHDL description of a 4-bit magnitude comparator inputs with expansion)
- 2005-10-28 22:35:12下载
- 积分:1