这是用VHDL编写的译码程序,程序简单易懂

powerlink最新的开源全部VHDL及C/C++代码，用于powerlink的开发。是当前最新版本。包含Linux的实现及nios /arm软核的实现。可以用于xinx和Altera的FPGA。

VHDL的源码100例，包括加法、减法、存储、触发等，是初学者、开发人员的必备手册-VHDL source code of the 100 cases, including the addition, subtraction, storage, trigger and so on, is for beginners, developers must Manual

VHDL硬件描述语言与数字逻辑电路设计-VHDL hardware description language and digital logic circuit design

说明：  基于quartusII的QDPSK调制解调vhdl程序。(Modulation and demodulation based quartusII of QDPSK vhdl program.)

说明：  电子工程师学习的最好的学习资料，能够了解电子设计必学软件资料。建议珍藏，电子设计初学者必备(Electronic engineers to learn the best learning materials, to understand the electronic design will learn software data. Recommended collection, electronic design for beginners)

uart documentation, july 17, 2019. the document describes the basics of verilog programming and how to implement them on an fpga device

数字电路与逻辑设计实验编程，包含多功能电子钟程序，实用，简易(Digital circuits and logic design experiments programming, including multi-function electronic clock procedures, practical, simple)

1024点快速傅里叶变换，使用verilog hdl硬件描述语言(1024point FFT，using verilog hdl)

图像处理的中值滤波器，使用verilog开发环境编程实现。(Verilog development environment programming median filter)

使用FPGA透过RS232与PC的作沟通，