VHDL实现SPI功能源代码
于 2022-01-26 发布
文件大小:63.86 kB
0 141
下载积分: 2
下载次数: 1
代码说明：
VHDL实现SPI功能源代码 -- The SPI bus is a 3 wire bus that in effect links a serial shift -- register between the "master" and the "slave". Typically both the -- master and slave have an 8 bit shift register so the combined -- register is 16 bits. When an SPI transfer takes place, the master and -- slave shift their shift registers 8 bits and thus exchange their 8 -- bit register values.-SPI realize the functional VHDL source code The SPI bus is a 3 wire bus that in effect links a serial shift register between the
下载说明：请别用迅雷下载，失败请重下，重下不扣分！
发表评论
