这是DES的Verilog源代码（数据加密标准）是用来在N.

VHDL语言实现PWM信号，非常方便的使用-VHDL language realize PWM signal, very convenient to use

E1 (FIRST ORDER EUROPE TRANSMISSION STANDARD)qw

实现米粒状态机 用verilog语言实现状态机的过程(Implement a state machine with a grain of rice verilog state machine language course)

本代码用verilog语言配合sopc和nios实现了串口调试的目的。软件编程用C语言描述，只是比较简单的例子，适合初学者做了解用，本人亲自在EP2C8Q上实践。(The code to use verilog language sopc and nios achieved with serial debugging purposes. Software programming using C language description, but relatively simple example for beginners to do with understanding, I personally EP2C8Q on practice.)

一个完整的基于FPGA的IIR低通滤波器的设计方案，是一个研究生论文(master and doctor dissertation)

在赛灵思的FPGA上实现turbo码的编码程序,使用Verilog语言实现。(Implemented on Xilinx FPGA in the turbo coding principle, the use of Verilog language.)

用VHDL写的数字锁相环程序 pll.vhd为源文件 pllTB.vhd为testbench-pll.vhd : PLL written in VHDL hardware language. pllTB.vhd is a test program for pll.vhd.

精通VerilogHDL：IC设计核心技术实例详解-proficient VerilogHDL : IC design example explanation of the core technology

说明：  FPGA与PC端实现串口数据的收发，先从PC端接收数据，然后发回给电脑，可通过串口助手验证。(The serial port data is sent and received between the FPGA and the PC. First, the data is received from the PC, and then sent back to the computer. It can be verified by the serial port assistant.)

说明：  A low pass filter module based on FPGA, easy to transplant