这是DES的Verilog源代码（数据加密标准）是用来在N.

cy68013 vhdl code and usb high speed

具有先进后出的堆栈功能。此LIFO堆栈具有两个按键（write， read），按下write键后，开始输入数据data0-data3；按下read键后，7段数码管开始倒序显示data3-data0（十进制）。 高级要求（可选）： 按下write键，VGA显示“Write”字样，并同时显示输入数据；按下read键，VGA显示“Read”字样，并同时显示输出数据。

Join repetitive control, Very convenient to use, Iterative self-organizing data analysis.

4位电子密码锁，带键盘扫描、按键防抖动、LCD驱动编译码-four electronic password lock with a keyboard scan button shake, LCD driver encryption

Verilog Blocking and Non Blocking

说明：  实现对LCD1602的Verilog HDL编程(the program for LCD1602 based on Verilog HDL)

This is the source code for I2C(Inter Integreted Circuit) which is used in serial communication

VHDL由简单存储器，计数器等搭建最终实现8位的cpu设计(VHDL realization 8 of cpu design)

用VHDL语言将二进制数据转换成十进制数据，并将十进制的每一个位分离出来单独存放。使用状态机实现，程序简单，仿真效果很理想，占用可编程器件的资源较少。-VHDL language with the binary data into decimal data and decimal places separated from each store individually. Realize the use of state machine, the program is simple, simulation results are satisfactory, occupation of programmable devices have fewer resources.

说明：  FPGA与PC端实现串口数据的收发，先从PC端接收数据，然后发回给电脑，可通过串口助手验证。(The serial port data is sent and received between the FPGA and the PC. First, the data is received from the PC, and then sent back to the computer. It can be verified by the serial port assistant.)