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MyPCICard
是用于pci开发的核,可以将硬件的信息映射到然间上来 节省出开发人员用于了解硬件的时间 (Pci developed for nuclear, hardware information can be mapped to the inter-ran up to save the developers time to understand the hardware)
- 2008-08-10 19:49:03下载
- 积分:1
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sync_bitops
Set a bit and return its old value.
- 2015-06-23 14:22:31下载
- 积分:1
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grlib-gpl-1.1.0-b4108
gaisler公司在2011年发布的的leon3的源代码!(source code of leon3 )
- 2012-05-12 00:12:20下载
- 积分:1
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In the FPGA to achieve the sound card interface, flower, filter comparators, the...
在FPGA上实现声卡接口,电子琴,滤波比较器,最终实现语音通信
-In the FPGA to achieve the sound card interface, flower, filter comparators, the eventual realization of voice communications
- 2022-01-25 20:35:57下载
- 积分:1
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quartus2tutorial
说明: 自己收集的quartus2 教程以及vhdl语言教程,和如何在quartus中使用modism仿真 ,希望对大家有用(Tutorial quartus2 own collection, as well as language tutorials vhdl and quartus how to use modism, useful for all of us hope)
- 2009-07-27 09:09:22下载
- 积分:1
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Complete-RAM
ram 64KB designed by haneesh in verilog
- 2011-07-15 00:57:01下载
- 积分:1
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kt1
基于FPGA的可控100进制可逆计数器,运行环境maxplus(Controlled 100 hex reversible counter FPGA-based operating environment maxplus)
- 2012-05-17 12:19:54下载
- 积分:1
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cnt60
de2开发板上的一个小程序 模60的计数器/分频器(de2 board developed a small program module 60 of the counter/divider)
- 2011-11-28 20:28:12下载
- 积分:1
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32位元浮点数加法器,用于以VHDL编写的32位元CPU
32位元浮点数加法器,用于以VHDL编写的32位元CPU-32 bits floating-point Add
- 2022-10-08 15:20:02下载
- 积分:1
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VHDL,verilog串并转换源程序
Xilinx公司参考资料
VHDL,verilog串并转换源程序
Xilinx公司参考资料-VHDL, verilog Series and conversion company Xilinx reference source
- 2023-04-26 17:40:03下载
- 积分:1