直接频率合成，Quicklogic提供,部分源文件是Quicklogic 专用文件

包含DCT变换，RGB2YCBCR,JPEG等多个verilog代码及工程(Contains DCT transform, RGB2YCBCR, JPEG and many other verilog code and project)

ps2接口的工程实现，顶层为原理图，便于理解-ps2 interface engineering implementation, the top-level schematic diagram for easy understanding of

vhdl code for multiplexer and detemines how multiplexer works

可以实现DDC各个模块的功能，如内插、抽取、FIR滤波等功能(DDC can realize the function of each module, such as interpolation, extraction, FIR filtering)

基于CPLD的交通信号灯的实现，使用VHDL语言，使用不同颜色的二极管分别代表红黄绿三种信号灯。在数码管上可以分别显示倒计时。

An universal shift register performs the following tasks load, right shift ,left shift and parallel load as the selection inputs are 00,01,10,11 respectively. Such a register is implemented here in Quartus.

uvm验证方法学入门。step by step，适合IC验证人员入门(uvm verification methodology started. step by step, for IC verification personnel entry)

ADI ad9361 vivado 下源代码(ADI ad9361 vivado source code)

不错的介绍verilog的电子文档，对于入门级的新手有不错的参考价值-A good introduction to verilog electronic documents, for the novice there is a good entry-level reference value

MICarrayWeights and MICarrayplot