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Using VHDL realize the divider, so very, simulation adopted
用VHDL实现的除法器,非常好使,仿真通过了-Using VHDL realize the divider, so very, simulation adopted
- 2023-06-11 22:15:03下载
- 积分:1
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verilog实现的“BCD/七段译码器”。
verilog实现的“BCD/七段译码器”。-verilog implementation " BCD/Seven-Segment Decoder."
- 2022-12-23 05:15:02下载
- 积分:1
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encode
RS(255,223)编码器,已实际运用到产品中(RS (255,223) encoder has actually applied to products)
- 2021-05-13 00:30:02下载
- 积分:1
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msttr是用vhdl语言开发的一个交通灯程序
msttr是用vhdl语言开发的一个交通灯程序-msttr VHDL language is a development of the traffic lights procedures
- 2022-02-25 21:15:30下载
- 积分:1
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浅显易懂的vrilogHDL的程序,可以帮助你迅速上手
浅显易懂的vrilogHDL的程序,可以帮助你迅速上手-Easy and simple VerilogHDL programs to help you to get to the language quickly.
- 2022-03-05 20:26:55下载
- 积分:1
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VHDL实现SPI接口转I2c接口的源代码,可以直接调用
VHDL实现SPI接口转I2c接口的源代码,可以直接调用-VHDL realize I2C interface SPI interface to the source code, you can directly call
- 2023-03-01 17:50:04下载
- 积分:1
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Based on the state of the optical encoder Figure 4 multiplier vhdl procedure, en...
基于状态图的光电编码器4倍频vhdl程序,输入相位差90度的两相,输出倍频和方向信号-Based on the state of the optical encoder Figure 4 multiplier vhdl procedure, enter a 90-degree phase difference of two-phase, frequency and direction of the output signal
- 2022-03-17 02:46:02下载
- 积分:1
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Verilog ADPLL文件与测试
verilog ADPLL file with testbench
- 2022-04-18 06:08:09下载
- 积分:1
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singlecycle_mips
single cycle mips design by verilog.
- 2020-09-07 19:48:02下载
- 积分:1
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BCH3
BCH3.c,提供m<21以下的所有码长的BCH编解码模块。以供大家参考。谢谢(BCH encoder&decoder GF(2^m) m<21)
- 2021-01-26 11:58:36下载
- 积分:1