本文为verilog的源代码

eDP接口TFT-LCD显示驱动原码（verilog+c）(eDP Interface TFT-LCD display driver source code (verilog+c))

基于cordic算法的DDS的Verilog代码。经过仿真验证，绝对可靠。(Based on cordic algorithm DDS Verilog code. Through the simulation, is absolutely reliable.)

层合板的刚度的计算和验算，包括拉伸刚度A、弯曲刚度D以及耦合刚度B。 首先要给定层合板的各个参数，具体有：层合板的层数N；各单层的弹性常数E1、E2、 、G12；各单层对应的厚度；各单层对应的主方向夹角 。(The stiffness of laminated plates is calculated and checked, including tensile stiffness, A, flexural stiffness, D and coupling stiffness B. First of all, it is necessary to give the parameters of laminated plates, such as the number of plies N, the elastic constants of each layer, E1, E2, and G12, the thickness of each monolayer, and the angle of the main direction corresponding to each single layer.)

8位十六进制频率计设计 根据频率的定义和频率测量的基本原理，测定信号的频率必须有一个脉宽为1s的输入信号脉冲计数允许信号；1s计数结束后，计数值被锁入锁存器，计数器清零，为下一测频计数周期做好准备。测频控制信号可由一个独立的发生器（FTCTRL）来产生。-8-bit hexadecimal Cymometer designed in accordance with the definition of frequency and frequency of the basic principles of measurement to determine the frequency of the signal must have a pulse width of the input signal for 1s permit pulse counting signal 1s counting after the total value was locked into the lock depositors, counters cleared for the next count cycle frequency measurement ready. Frequency control signal generator may be an independent (FTCTRL) to generate.

xilinx xc9572 cpld 实现的伺服电机控制器，电机控制输出，和增量编码器读取。-Xilinx xc9572 cpld achieve servo motor controller, motor control output, Incremental encoder and the reader.

基于fpga的正弦波发生器设计，有一定的参考价值，写的比较详细-The sine wave generator based on FPGA design, have a certain reference value, a more detailed written

数字频率计 数字频率计-Digital frequency meter digital frequency meter

Fast Fourier Transform (FFT) 32K Point Design contains information about the design example

一个用verilog写的串行传输到并行传输的程序，在quaters下编的-Using Verilog to write a serial transmission to the parallel transmission of the procedure, under the quaters

温度液晶显示演示程序 LCD数据线：P0口 LCD控制线：RS P20 RW P21 E P22 BUSY P07 18B20端口DQ ：P27 (Temperature of liquid crystal display demo Data line: P0 LCD LCD RS P20 RW P21 control line: E P22 BUSY P07 18B20 DQ : P27 port )