Using Verilog to write a serial transmission to the parallel transmission of the...

闹钟设计，VHDL，源代码。闹钟设计，VHDL，源代码。(Alarm clock design, VHDL, the source code.)

这里面有许多vhdl的例子，相信对这语言的初学者受益匪浅-There are many examples of vhdl, I believe that beginners benefit from this language

verilog实现闪烁灯和流水灯dechengxu-verilog liushuideng shanshuodeng chengxu

一个Verilog的JTAG程序例子，包括完整的说明文档和源文件。(tap_top.v This file is part of the JTAG Test Access Port (TAP) http://www.opencores.org/projects/jtag/ Author(s): Igor Mohor (igorm@opencores.org))

FPGA驱动高输入电压范围的ADS8509芯片，采样范围广，适合前端大信号处理(FPGA drive a high input voltage range ADS8509 chip, sampling a wide range, suitable for large front-end signal processing)

Pipeline processor verilog components

This paper analyzes the cryptography scheme of the Trust Platform Model(TPM). The focus of the discussion would be the comparison of elliptic curve cryptography and the nowadays widely used 2048-bit RSA in evaluating which would be better suited to be used on TPM. A TPM implementation scheme based on ECC is proposed, which includes encryption and decryption schemes, signature and verification scheme, key agreement scheme. Corresponding examples of TPM commands would also be given.

说明：  matlab代码，利用Farrow结构设计分数延时滤波器，滤波器阶数和个数可分别进行设置，利用最大最小准则近似。(Matlab code, using Farrow structure design fractional delay filter, filter order and number can be set separately, using the maximum and minimum criterion approximation.)

AD7685芯片采集程序，可以自行设置采样率，经检验可用。(The AD7685 chip collection procedures, available.)

vhdl抗抖动滤波器的设计，包括完整的工程-VHDL anti-jitter filter design, including the complete works