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适用于FPGA的SOPC方面的元器件添加,如COMPNENT
适用于FPGA的SOPC方面的元器件添加,如COMPNENT-Applicable to FPGA-SOPC area to add components, such as COMPNENT
- 2022-02-10 17:06:47下载
- 积分:1
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VHDL 加法器
这个程序是 用于两个浮点数字加法器使用 VHDL 语言。
- 2022-02-06 15:47:18下载
- 积分:1
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96x96数字复用/解复用SPI
96x96 Digital MUX/DEMUX via SPI
- 2023-08-24 02:45:04下载
- 积分:1
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mancheshitebianjiema
用VHDL编写的曼切斯特编解码,适用于以太网上流行的基带传输数字编码。(Manchester encoding and decoding written using VHDL, popular Ethernet baseband transmission of digital coding.)
- 2012-05-25 15:16:35下载
- 积分:1
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FPGA-powe-analysis-tool-EPE
FPGA功耗分析工具EPE用于分析FPGA系统的功耗(FPGA power analysis tools EPE is used to analyze the power consumption of the FPGA system)
- 2012-11-19 17:08:00下载
- 积分:1
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等精度数字频率计
的一个工程
等精度数字频率计
的一个工程---包括vhdl源程序和编译后产生的相关文件-Such as precision digital frequency of a project- including VHDL source code and compile the relevant documents after
- 2022-11-14 20:40:03下载
- 积分:1
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8832135
一个具有“百分秒,秒,分”计时功能的数字跑表,可以实现一个小时以内的精确至百分之一秒的计时。
数字跑表的显示读者可以通过编写数码管显示程序来实现,本训练只给出数字跑表的实现过程。
读者还可以通过增加小时的计时功能,实现完整的跑表功能。(A " percentage of seconds, seconds, minutes," digital stopwatch timer can be achieved within an hour of precision to the hundredth of a second time. Digital stopwatch readers can display the digital display through the preparation of procedures to achieve, given the training is only the realization of the process of digital stopwatch. Readers can also function to increase hours of time to achieve full stopwatch function.)
- 2009-04-09 13:20:35下载
- 积分:1
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csbar(3) : X"E0000" to X"E01FF"
-- M68008 Address Decoder
-- Address decoder for the m68008
-- asbar must be 0 to enable any output
-- csbar(0) : X"00000" to X"01FFF"
-- csbar(1) : X"40000" to X"43FFF"
-- csbar(2) : X"08000" to X"0AFFF"
-- csbar(3) : X"E0000" to X"E01FF"
-- download from www.pld.com.cn & www.fpga.com.cn
--- M68008 Address Decoder-- Address decod er for the m68008-- 0 asbar must be to enable any o utput-- csbar (0) : X "00000" to X "01FFF"-- csbar (1) : X "40000" to X "43FFF"-- csbar (2) : X "08000" to X "0AFFF"-- csbar (3) : X "E0000" to X "E01FF"-- download from www.pld. com.cn
- 2022-02-26 21:53:57下载
- 积分:1
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一个霹雳灯的Verilog源程序,用PWM原理实现,产生了LED灯的渐弱效果...
一个霹雳灯的Verilog源程序,用PWM原理实现,产生了LED灯的渐弱效果-a thunderbolt lights Verilog source files, using PWM principle realized, LED lights have a gradual effect of the weak
- 2023-07-28 11:50:03下载
- 积分:1
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fpga实例程序代码
关于FPGA的一些例程,包括CORDIC数字计算机的设计,RS(204,188)译码器的设计等。(Some routines on FPGA include the design of CORDIC digital computers, the design of RS (204188) decoders, etc.)
- 2018-07-21 19:08:25下载
- 积分:1