xilinx xc9572 cpld 实现的伺服电机控制器，电机控制输出，和增量编码器读取。...

用ALTERA的FPGA实现UDP通信源代码(FPGA UDP)

用verilog编写的乒乓球游戏，内带ps2，VGA驱动，下载到spantan3开发板上即可使用（原创）-Prepared using Verilog table tennis game, with band ps2, VGA driver, download to spantan3 development board to use (original)

EP2C5核心电路原理图，包括protel文件及其相应封装库-EP2C5 Core circuit Sch

基于Verilog的小波滤波器程序设计的总结文档。(Verilog based wavelet filter program design summary document.)

vhdl交通灯实验报告-VHDL traffic lights Experimental Report

VGA显示原理与VGA时序实现论文,详细介绍了VGA的原理 (Principle and VGA VGA display timing to achieve paper, detailing the principles VGA)

Time divisor vhdl code

说明：  1. REVISION HISTORY 2. OVERVIEW 3. SOFTWARE TOOLS AND SYSTEM REQUIREMENTS 4. DESIGN FILE HIERARCHY 5. INSTALLATION AND OPERATING INSTRUCTIONS 6. SUPPORT

FIR滤波器的VHDL语言实现(The implement of FIR Filter based on VHDL)

文章运用分级抽取和多相滤波的方法改进传统CIC滤波器的结构,降低了系统工作频率,运用幅度改进函数(ACF)和外加级联余弦预滤波器的技术改进了滤波器频率响应,提出了一种高效的算法结构,改善了通带损耗,增大了阻带衰减,对CIC滤波器的实际应用和深入研究有着现实意义。 (Article the use of hierarchical multi-phase extraction and filtering methods to improve the structure of the traditional CIC filter, reducing the system operating frequency, the use of margin to improve the function (ACF) and the cosine cascade plus pre-filter technology to improve the filter frequency response, the an efficient algorithm to improve the pass-band loss, increases the stopband attenuation of the CIC filter in practical applications and in-depth study has practical significance.)