为了便于信号发射，提高信道利用率、发射功率效率以及改善通信质量，人们研制出各种通信信号的调制样式。尽管调制样式多种多样，但实质上调制不外乎用调制信号去控制载波的...

用VHDL写的一个显示程序，希望能帮上大家的忙，嘿嘿。-Written in VHDL, a display procedure, hoping that would help everyone a favor on the Hei hei.

LDPC Encoding Ebook Tetourial code

USB设备接口的驱动程序，采用verilogHDL语言编写，并包含相关说明资料(USB device driver interface, using verilogHDL language, and contains descriptive information)

Very good info. for RS-232 echo VHDL code .

基于FPGA的pci总线接口设计。。。。。。。。。。。。。(FPGA-based PCI bus interface design)

9针的rs232与fpga之间的串口通信源程序(Rs232 9 pin serial communication with the source between fpga)

I2C verilog 源代码 非常好的代码，大家可以-I2C verilog source code for a very good code, we can

基于OV7670采集，SDRAM缓存，sobel处理，VGA显示的工程，内有全部代码，基于QUARTUS开发板实现。 FPGA 边缘检测(Based on OV7670 acquisition, SDRAM cache, sobel processing, VGA display project, with all the code, based on QUARTUS development board. FPGA edge detection)

异步FIFO的实现，可综合，可验证] keywords:almost_full,full,almost_empty,empty-The realization of asynchronous FIFO can be comprehensive, verifiable] keywords: almost_full, full, almost_empty, empty

DDS实验 matlab 与quartus 的完美结合(DDS experimental combination of matlab and quartus)