本代码实现了486总线的功能，初学者可以借鉴学习

说明：  ds1302时钟驱动程序，已在quartus上验证可以是直接使用(DS1302 clock driver, which has been verified on quartus, can be used directly)

用verilog实现sd卡读写，亲测可用(Implementation of SD card read and write with Verilog)

用VHDL写的数字锁相环程序 pll.vhd为源文件 pllTB.vhd为testbench-pll.vhd : PLL written in VHDL hardware language. pllTB.vhd is a test program for pll.vhd.

VHDL、Verilog HDL语言，是华为公司的技术指导书，希望对你有所帮助-VHDL、Verilog HDL

32位/33M 从模式(target)PCI接口参考设计，Lattice提供。由于PCI时序较复杂，此设计仅能供参考-32/route from the model (target) PCI reference design, Lattice provided. Because PCI timing more complicated, and the design for reference only

UART功能,可以增加在NIOS2內,主要來做外部Flash的擦除及寫入,需搭配上位機傳輸字串來控制(UART function, can increase the NIOS2, the main external Flash to do the erase and write, to be a string with the host computer to control the transmission)

基于FPGA的AD和DA设计代码及文档(Design code and document of AD and DA based on FPGA)

初学ＶＨＤＬ有用的，了解后对复杂设计有很大帮助．-VHDL beginner useful understanding of the complexity of the design has been inspired by them.

FPGA的存储器代码的VHDL,verilog描述及测试代码-FPGA memory code VHDL, verilog description and test code

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