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Sopc technology
基于sopc技术的数字均衡器带通滤波器及12864液晶显示-Sopc technology-based digital equalizer band-pass filter and liquid crystal display 12864
- 2022-10-06 03:55:04下载
- 积分:1
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VHDL USB2.0接口源码,内有说明,详细.
VHDL USB2.0接口源码,内有说明,详细.-VHDL USB2.0 interface source code, which is described in detail.
- 2022-04-29 19:53:42下载
- 积分:1
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THU微纳电子系ic设计课程大作业CNN
说明: THU微纳电子系ic设计课程大作业,使用verilog实现CNN加速器,含一层卷积和池化,仿真通过。(a CNN accelerator written in VerilogHDL, including one conv layer and one pooling layer, simulation passed)
- 2020-07-06 20:18:57下载
- 积分:1
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vhdl语言和verilog语言转换工具
能很容易的实现两种语言的相互转换...
vhdl语言和verilog语言转换工具
能很容易的实现两种语言的相互转换-verilog language vhdl language and conversion tools can easily achieve the conversion between two languages
- 2022-08-16 14:34:56下载
- 积分:1
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Slave-FIFO
详细讲解Slave FIFO模式下的初始化设置和相对应寄存器说明(Explain in detail the initial setup Slave FIFO mode and the corresponding register description)
- 2014-03-18 17:33:23下载
- 积分:1
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MVB_test
此功能是实现曼彻斯特编码的Verilog代码,经过在xilinx sp6上实际运行证实可行。(This function is to achieve the Manchester code Verilog code, through the Xilinx SP6 actual operation proved.)
- 2021-01-03 17:48:56下载
- 积分:1
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suzimiaobiao
数字秒表的实现,我还写个具体的过程要求等,(there is function of clock,it very useful)
- 2011-09-20 14:28:30下载
- 积分:1
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PIP
基于FPGA的画中画处理PDF技术文档,采用SD卡里图片读出来做为底图,然后再图上叠加另外一个图片或者视频(Based on the FPGA picture in picture processing PDF technical documentation
)
- 2014-07-10 17:56:04下载
- 积分:1
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PPM解码器
本代码主要功能是PPM解码,采用Verilog语言,通过移位寄存器和组合电路实现解码。(The main function of this code is PPM decoding.)
- 2020-12-10 18:29:19下载
- 积分:1
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Verilog 下 16位除法算法程序,高精度,固定17个时钟周期
Verilog 下 16位除法算法程序,高精度,固定17个时钟周期-Verilog under 16 division algorithm procedures, high-precision, fixed in 17 clock cycles
- 2022-01-27 13:18:06下载
- 积分:1